]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arc: Refurbish add.f combiner patterns
authorClaudiu Zissulescu <claziss@gmail.com>
Tue, 10 Oct 2023 07:11:39 +0000 (10:11 +0300)
committerClaudiu Zissulescu <claziss@gmail.com>
Tue, 10 Oct 2023 08:38:55 +0000 (11:38 +0300)
Refurbish add compare patterns: use 'r' constraint, fix identation,
and fix pattern to match 'if (a+b) { ... }' constructions.

gcc/

* config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
the first operand.
* config/arc/arc.md (addsi_compare): Make pattern canonical.
(addsi_compare_2): Fix identation, constraint letters.
(addsi_compare_3): Likewise.

gcc/testsuite/

* gcc.target/arc/add_f-combine.c: New test.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
gcc/config/arc/arc.cc
gcc/config/arc/arc.md
gcc/testsuite/gcc.target/arc/add_f-combine.c [new file with mode: 0644]

index ecc681cff611302b799ec450e64206ce127a8faa..00427d859cc477fcfb1b4c86b801f05ca66df2a2 100644 (file)
@@ -1562,7 +1562,7 @@ arc_select_cc_mode (enum rtx_code op, rtx x, rtx y)
 
   /* add.f for if (a+b) */
   if (mode == SImode
-      && GET_CODE (y) == NEG
+      && GET_CODE (x) == NEG
       && (op == EQ || op == NE))
     return CC_ZNmode;
 
index cedb9517bb0c33dedd04fb929d66eed79a54476d..a936a8be53d92dac4217d42a04018215a2bf0c45 100644 (file)
@@ -1102,34 +1102,33 @@ archs4x, archs4xd"
 ; the combiner needs this pattern
 (define_insn "*addsi_compare"
   [(set (reg:CC_ZN CC_REG)
-       (compare:CC_ZN (match_operand:SI 0 "register_operand" "c")
-                      (neg:SI (match_operand:SI 1 "register_operand" "c"))))]
+       (compare:CC_ZN (neg:SI
+                       (match_operand:SI 0 "register_operand" "r"))
+                      (match_operand:SI 1 "register_operand"  "r")))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4")])
 
-; for flag setting 'add' instructions like if (a+b < a) { ...}
-; the combiner needs this pattern
 (define_insn "addsi_compare_2"
   [(set (reg:CC_C CC_REG)
-       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "c,c")
-                              (match_operand:SI 1 "nonmemory_operand" "cL,Cal"))
-                     (match_dup 0)))]
+       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand"   "r,r")
+                              (match_operand:SI 1 "nonmemory_operand" "rL,Cal"))
+                     (match_dup 0)))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4,8")])
 
 (define_insn "*addsi_compare_3"
   [(set (reg:CC_C CC_REG)
-       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "c")
-                              (match_operand:SI 1 "register_operand" "c"))
-                     (match_dup 1)))]
+       (compare:CC_C (plus:SI (match_operand:SI 0 "register_operand" "r")
+                              (match_operand:SI 1 "register_operand" "r"))
+                     (match_dup 1)))]
   ""
-  "add.f 0,%0,%1"
+  "add.f\\t0,%0,%1"
   [(set_attr "cond" "set")
    (set_attr "type" "compare")
    (set_attr "length" "4")])
diff --git a/gcc/testsuite/gcc.target/arc/add_f-combine.c b/gcc/testsuite/gcc.target/arc/add_f-combine.c
new file mode 100644 (file)
index 0000000..cfa3676
--- /dev/null
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+/* Check if combiner is matching add.f patterns.  */
+
+int a1 (int a, int b)
+{
+  if (a + b)
+    {
+      return 1;
+    }
+  return a + 2;
+}
+
+/* { dg-final { scan-assembler "add.f\\s+0,r\\d+,r\\d+" } } */