mips: fix corner case for INS instruction

This change fixes corner case for INS instruction when lsb = 0.
The test in none/tests/mips32/MIPS32int.c will be extended to include
additional test cases that trigger this condition.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2715

diff --git a/VEX/priv/guest_mips_toIR.c b/VEX/priv/guest_mips_toIR.c
index 62f67f1f987b5ea83545dd1ed6922869cc877b05..02632d08c0301aee11d83ef6ed5911ed93411033 100644 (file)
--- a/VEX/priv/guest_mips_toIR.c
+++ b/VEX/priv/guest_mips_toIR.c
@@ -4614,7 +4614,8 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *,
             assign(t2, binop(Iop_Shl32, mkNarrowTo32(ty, getIReg(rt)),
                              mkU8(32 - lsb)));
             assign(t3, binop(Iop_Shr32, mkexpr(t2), mkU8(32 - lsb)));
-         }
+         } else 
+            assign(t3, mkU32(0));
 
          if (msb < 31) {
             t4 = newTemp(Ity_I32);
@@ -4629,14 +4630,14 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *,
                t6 = newTemp(Ity_I32);
                assign(t6, binop(Iop_Or32, mkexpr(t5), mkexpr(t1)));
                putIReg(rt, mkWidenFrom32(ty, binop(Iop_Or32, mkexpr(t6),
-                                                   mkexpr(t3)), False));
+                                                   mkexpr(t3)), True));
             } else {
                putIReg(rt, mkWidenFrom32(ty, binop(Iop_Or32, mkexpr(t1),
-                                                   mkexpr(t5)), False));
+                                                   mkexpr(t5)), True));
             }
          } else {
             putIReg(rt, mkWidenFrom32(ty, binop(Iop_Or32, mkexpr(t1),
-                                                mkexpr(t3)), False));
+                                                mkexpr(t3)), True));
          }
          break;