i386: Macroize compound shift patterns some more

Merge ashl and <any_shiftrt:code> compound define_insn_and_split
patterns to form <any_shift:code> macroized pattern.

No functional changes.

gcc/ChangeLog:

	* config/i386/i386.md (*<any_shift:insn><mode>3_mask): Macroize
	pattern from *ashl<mode>3_mask and *<any_shiftrt:insn><mode>3_mask
	using any_shift code iterator.
	(*<any_shift:insn><mode>3_mask_1): Macroize pattern
	from *ashl<mode>3_mask_1 and *<any_shiftrt:insn><mode>3_mask_1
	using any_shift code iterator.
	(*<any_shift:insn><mode>3_add): Macroize pattern
	from *ashl<mode>3_add and *<any_shiftrt:insn><mode>3_add
	using any_shift code iterator.
	(*<any_shift:insn><mode>3_add_1): Macroize pattern
	from *ashl<mode>3_add_1 and *<any_shiftrt:insn><mode>3_add_1
	using any_shift code iterator.
	(*<insn><mode>3_sub): Macroize pattern
	from *ashl<mode>3_sub and *<any_shiftrt:insn><mode>3_sub
	using any_shift code iterator.
	(*<any_shift:insn><mode>3_sub_1): Macroize pattern
	from *ashl<mode>3_sub_1 and *<any_shiftrt:insn><mode>3_sub_1
	using any_shift code iterator.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2fc48006bca750214931762aa0bc8758af9ffa1d..8eb9cb682b11b67debe4bc766c523aeb134a8bf1 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15847,157 +15847,6 @@
   DONE;
 })
 
-;; Avoid useless masking of count operand.
-(define_insn_and_split "*ashl<mode>3_mask"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (and
-             (match_operand 2 "int248_register_operand" "c,r")
-             (match_operand 3 "const_int_operand")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
-      == GET_MODE_BITSIZE (<MODE>mode)-1
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*ashl<mode>3_mask_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (and:QI
-           (match_operand:QI 2 "register_operand" "c,r")
-           (match_operand:QI 3 "const_int_operand"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
-      == GET_MODE_BITSIZE (<MODE>mode)-1
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-  ""
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*ashl<mode>3_add"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (plus
-             (match_operand 2 "int248_register_operand" "c,r")
-             (match_operand 3 "const_int_operand")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*ashl<mode>3_add_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (plus:QI
-           (match_operand:QI 2 "register_operand" "c,r")
-           (match_operand:QI 3 "const_int_operand"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-  ""
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*ashl<mode>3_sub"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (minus
-             (match_operand 3 "const_int_operand")
-             (match_operand 2 "int248_register_operand" "c,r")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 4)
-          (neg:QI (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])
-   (parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 4)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-
-  operands[4] = gen_reg_rtx (QImode);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*ashl<mode>3_sub_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (ashift:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (minus:QI
-           (match_operand:QI 3 "const_int_operand")
-           (match_operand:QI 2 "register_operand" "c,r"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 4)
-          (neg:QI (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])
-   (parallel
-     [(set (match_dup 0)
-          (ashift:SWI48 (match_dup 1)
-                        (match_dup 4)))
-      (clobber (reg:CC FLAGS_REG))])]
-  "operands[4] = gen_reg_rtx (QImode);"
-  [(set_attr "isa" "*,bmi2")])
-
 (define_insn "*bmi2_ashl<mode>3_1"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
        (ashift:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm")
@@ -16675,157 +16524,6 @@
   DONE;
 })
 
-;; Avoid useless masking of count operand.
-(define_insn_and_split "*<insn><mode>3_mask"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (and
-             (match_operand 2 "int248_register_operand" "c,r")
-             (match_operand 3 "const_int_operand")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
-      == GET_MODE_BITSIZE (<MODE>mode)-1
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*<insn><mode>3_mask_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (and:QI
-           (match_operand:QI 2 "register_operand" "c,r")
-           (match_operand:QI 3 "const_int_operand"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
-      == GET_MODE_BITSIZE (<MODE>mode)-1
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-  ""
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*<insn><mode>3_add"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (plus
-             (match_operand 2 "int248_register_operand" "c,r")
-             (match_operand 3 "const_int_operand")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*<insn><mode>3_add_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (plus:QI
-           (match_operand:QI 2 "register_operand" "c,r")
-           (match_operand:QI 3 "const_int_operand"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])]
-  ""
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*<insn><mode>3_sub"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (subreg:QI
-           (minus
-             (match_operand 3 "const_int_operand")
-             (match_operand 2 "int248_register_operand" "c,r")) 0)))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 4)
-          (neg:QI (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])
-   (parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 4)))
-      (clobber (reg:CC FLAGS_REG))])]
-{
-  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
-  operands[2] = gen_lowpart (QImode, operands[2]);
-
-  operands[4] = gen_reg_rtx (QImode);
-}
-  [(set_attr "isa" "*,bmi2")])
-
-(define_insn_and_split "*<insn><mode>3_sub_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand")
-       (any_shiftrt:SWI48
-         (match_operand:SWI48 1 "nonimmediate_operand")
-         (minus:QI
-           (match_operand:QI 3 "const_int_operand")
-           (match_operand:QI 2 "register_operand" "c,r"))))
-   (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
-   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(parallel
-     [(set (match_dup 4)
-          (neg:QI (match_dup 2)))
-      (clobber (reg:CC FLAGS_REG))])
-   (parallel
-     [(set (match_dup 0)
-          (any_shiftrt:SWI48 (match_dup 1)
-                             (match_dup 4)))
-      (clobber (reg:CC FLAGS_REG))])]
-  "operands[4] = gen_reg_rtx (QImode);"
-  [(set_attr "isa" "*,bmi2")])
-
 (define_insn_and_split "*<insn><dwi>3_doubleword_mask"
   [(set (match_operand:<DWI> 0 "register_operand")
        (any_shiftrt:<DWI>
@@ -18093,6 +17791,157 @@
        (const_string "*")))
    (set_attr "mode" "QI")])
 
+;; Avoid useless masking of count operand.
+(define_insn_and_split "*<insn><mode>3_mask"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (subreg:QI
+           (and
+             (match_operand 2 "int248_register_operand" "c,r")
+             (match_operand 3 "const_int_operand")) 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1))
+      == <MODE_SIZE> * BITS_PER_UNIT - 1
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])]
+{
+  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
+  operands[2] = gen_lowpart (QImode, operands[2]);
+}
+  [(set_attr "isa" "*,bmi2")])
+
+(define_insn_and_split "*<insn><mode>3_mask_1"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (and:QI
+           (match_operand:QI 2 "register_operand" "c,r")
+           (match_operand:QI 3 "const_int_operand"))))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1))
+      == <MODE_SIZE> * BITS_PER_UNIT - 1
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])]
+  ""
+  [(set_attr "isa" "*,bmi2")])
+
+(define_insn_and_split "*<insn><mode>3_add"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (subreg:QI
+           (plus
+             (match_operand 2 "int248_register_operand" "c,r")
+             (match_operand 3 "const_int_operand")) 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])]
+{
+  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
+  operands[2] = gen_lowpart (QImode, operands[2]);
+}
+  [(set_attr "isa" "*,bmi2")])
+
+(define_insn_and_split "*<insn><mode>3_add_1"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (plus:QI
+           (match_operand:QI 2 "register_operand" "c,r")
+           (match_operand:QI 3 "const_int_operand"))))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])]
+  ""
+  [(set_attr "isa" "*,bmi2")])
+
+(define_insn_and_split "*<insn><mode>3_sub"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (subreg:QI
+           (minus
+             (match_operand 3 "const_int_operand")
+             (match_operand 2 "int248_register_operand" "c,r")) 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 4)
+          (neg:QI (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])
+   (parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 4)))
+      (clobber (reg:CC FLAGS_REG))])]
+{
+  operands[2] = force_reg (GET_MODE (operands[2]), operands[2]);
+  operands[2] = gen_lowpart (QImode, operands[2]);
+
+  operands[4] = gen_reg_rtx (QImode);
+}
+  [(set_attr "isa" "*,bmi2")])
+
+(define_insn_and_split "*<insn><mode>3_sub_1"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand")
+       (any_shift:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand")
+         (minus:QI
+           (match_operand:QI 3 "const_int_operand")
+           (match_operand:QI 2 "register_operand" "c,r"))))
+   (clobber (reg:CC FLAGS_REG))]
+  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
+   && (INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT - 1)) == 0
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(parallel
+     [(set (match_dup 4)
+          (neg:QI (match_dup 2)))
+      (clobber (reg:CC FLAGS_REG))])
+   (parallel
+     [(set (match_dup 0)
+          (any_shift:SWI48 (match_dup 1)
+                           (match_dup 4)))
+      (clobber (reg:CC FLAGS_REG))])]
+  "operands[4] = gen_reg_rtx (QImode);"
+  [(set_attr "isa" "*,bmi2")])
+
 (define_insn_and_split "*extend<dwi>2_doubleword_highpart"
   [(set (match_operand:<DWI> 0 "register_operand" "=r")
        (ashiftrt:<DWI>