]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx95-tqma9596sa: move pcie config to SOM
authorAlexander Stein <alexander.stein@ew.tq-group.com>
Thu, 30 Oct 2025 12:49:15 +0000 (13:49 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 17 Nov 2025 00:56:54 +0000 (08:56 +0800)
The muxing and other features are mostly determined by SOM, so add it
at this level.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts
arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi

index 5c94d8cf28c4cb397842d36b35d470af48c55ca3..8caf0c68ba9fcd489fb9a006961b851cede875bb 100644 (file)
 
 /* X44 mPCIe */
 &pcie0 {
-       pinctrl-0 = <&pinctrl_pcie0>;
-       pinctrl-names = "default";
-       clocks = <&scmi_clk IMX95_CLK_HSIO>,
-                <&pcieclk 1>,
-                <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
-       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
-       reset-gpio = <&expander2 9 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
 /* X22 PCIe x1 socket */
 &pcie1 {
-       pinctrl-0 = <&pinctrl_pcie1>;
-       pinctrl-names = "default";
-       clocks = <&scmi_clk IMX95_CLK_HSIO>,
-                <&pcieclk 0>,
-                <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
-                <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
-       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
-       reset-gpio = <&expander2 10 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
index e7edeec712dcb2b08bd85e3cfb82164f67390885..832c753abcd754385797a5683d5b8492ccb66363 100644 (file)
        };
 };
 
+&pcie0 {
+       pinctrl-0 = <&pinctrl_pcie0>;
+       pinctrl-names = "default";
+       clocks = <&scmi_clk IMX95_CLK_HSIO>,
+                <&pcieclk 1>,
+                <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+       reset-gpio = <&expander2 9 GPIO_ACTIVE_LOW>;
+};
+
+&pcie1 {
+       pinctrl-0 = <&pinctrl_pcie1>;
+       pinctrl-names = "default";
+       clocks = <&scmi_clk IMX95_CLK_HSIO>,
+                <&pcieclk 0>,
+                <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
+                <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
+       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+       reset-gpio = <&expander2 10 GPIO_ACTIVE_LOW>;
+};
+
 &sai3 {
        #sound-dai-cells = <0>;
        pinctrl-names = "default";