arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display

Add the BOE av123z7m-n17 variant of the Moduline Display, this variant
comes with a 12.3" 1920x720 display.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index ae9eb1ef08ee3839120d13d8e45e3617917f8daa..4da7501ece170bc0e0b157b61fef4d1e6ccf31eb 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -232,7 +232,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb
 
 imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
        imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtbo
+imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
+       imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtbo
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtb
 
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
new file mode 100644 (file)
index 0000000..3eb665c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2025 GOcontroll B.V.
+ * Author: Maud Spierings <maudspierings@gocontroll.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "imx8mp-pinfunc.h"
+
+/dts-v1/;
+/plugin/;
+
+&{/} {
+       model = "GOcontroll Moduline Display with BOE av123z7m-n17 display";
+
+       panel {
+               compatible = "boe,av123z7m-n17";
+               enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+               pinctrl-0 = <&pinctrl_panel>;
+               pinctrl-names = "default";
+               power-supply = <&reg_3v3_per>;
+               reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               dual-lvds-odd-pixels;
+
+                               panel_in0: endpoint {
+                                       remote-endpoint = <&lvds1_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               dual-lvds-even-pixels;
+
+                               panel_in1: endpoint {
+                                       remote-endpoint = <&lvds0_out>;
+                               };
+                       };
+               };
+       };
+};
+
+&i2c4 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+
+       /* sn65dsi85 */
+       bridge@2d {
+               compatible = "ti,sn65dsi84";
+               reg = <0x2d>;
+               enable-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
+               pinctrl-0 = <&pinctrl_lvds_bridge>;
+               pinctrl-names = "default";
+               vcc-supply = <&reg_1v8_per>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               dsi_lvds_bridge_in: endpoint {
+                                       data-lanes = <1 2 3 4>;
+                                       remote-endpoint = <&mipi_dsi_out>;
+                               };
+                       };
+
+                       port@2 {
+                               reg = <2>;
+
+                               lvds0_out: endpoint {
+                                       remote-endpoint = <&panel_in1>;
+                               };
+                       };
+
+                       port@3 {
+                               reg = <3>;
+
+                               lvds1_out: endpoint {
+                                       remote-endpoint = <&panel_in0>;
+                               };
+                       };
+               };
+       };
+
+       /* max25014 @ 0x6f */
+};
+
+&iomuxc {
+       pinctrl_lvds_bridge: lvdsbridgegrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14
+                               MX8MP_DSE_X1
+               >;
+       };
+
+       pinctrl_panel: panelgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
+                               MX8MP_DSE_X1
+                       MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
+                               MX8MP_DSE_X1
+               >;
+       };
+};
+
+&lcdif1 {
+       status = "okay";
+};
+
+&mipi_dsi {
+       /*
+        * burst has to be at least 2x dsi clock that the sn65dsi85 expects
+        * display pixelclock * bpp / lanes / 2 = dsi clock
+        * 88.000.000 * 24 / 4 / 2 = 264.000.000
+        * range gets rounded up to 265.000.000 - 270.000.000
+        * 267.500.000 * 2 = 535.000.000
+        */
+       samsung,burst-clock-frequency = <535000000>;
+       samsung,esc-clock-frequency = <12000000>;
+       status = "okay";
+
+       ports {
+               port@1 {
+                       mipi_dsi_out: endpoint {
+                               data-lanes = <1 2 3 4>;
+                               remote-endpoint = < &dsi_lvds_bridge_in>;
+                       };
+               };
+       };
+};