dmaengine: jz4780: Fix an endian bug in IRQ handler

commit 4c89cc73d1da42ae48b5c5dfbfd12304d0b86786 upstream.

The "pending" variable was a u32 but we cast it to an unsigned long
pointer when we do the for_each_set_bit() loop.  The problem is that on
big endian 64bit systems that results in an out of bounds read.

Fixes: 4e4106f5e942 ("dmaengine: jz4780: Fix transfers being ACKed too soon")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index f49534019d37dad9f1445c2693df1626df861e9c..503d9f13ea97d3e1c20346fdd70b8cd1993cee1a 100644 (file)
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -722,12 +722,13 @@ static irqreturn_t jz4780_dma_irq_handler(int irq, void *data)
 {
        struct jz4780_dma_dev *jzdma = data;
        unsigned int nb_channels = jzdma->soc_data->nb_channels;
-       uint32_t pending, dmac;
+       unsigned long pending;
+       uint32_t dmac;
        int i;
 
        pending = jz4780_dma_ctrl_readl(jzdma, JZ_DMA_REG_DIRQP);
 
-       for_each_set_bit(i, (unsigned long *)&pending, nb_channels) {
+       for_each_set_bit(i, &pending, nb_channels) {
                if (jz4780_dma_chan_irq(jzdma, &jzdma->chan[i]))
                        pending &= ~BIT(i);
        }