spi: tegra210-quad: modify chip select (CS) deactivation

[ Upstream commit d8966b65413390d1b5b706886987caac05fbe024 ]

Modify the chip select (CS) deactivation and inter-transfer delay
execution only during the DATA_TRANSFER phase when the cs_change
flag is not set. This ensures proper CS handling and timing between
transfers while eliminating redundant operations.

Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")
Signed-off-by: Vishwaroop A <va@nvidia.com>
Link: https://patch.msgid.link/20250416110606.2737315-4-va@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c
index d09e0b9ac18c4a41dc4be65fa84a509c78876a0e..f2a4743efcb47f00321d7b38fbcf4b37f4a0913f 100644 (file)
--- a/drivers/spi/spi-tegra210-quad.c
+++ b/drivers/spi/spi-tegra210-quad.c
@@ -1152,16 +1152,16 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
                                ret = -EIO;
                                goto exit;
                        }
-                       if (!xfer->cs_change) {
-                               tegra_qspi_transfer_end(spi);
-                               spi_transfer_delay_exec(xfer);
-                       }
                        break;
                default:
                        ret = -EINVAL;
                        goto exit;
                }
                msg->actual_length += xfer->len;
+               if (!xfer->cs_change && transfer_phase == DATA_TRANSFER) {
+                       tegra_qspi_transfer_end(spi);
+                       spi_transfer_delay_exec(xfer);
+               }
                transfer_phase++;
        }
        ret = 0;