arm64: dts: renesas: r8a77995: Move interrupt-parent to root node

Move the "interrupt-parent = <&gic>" property from the soc node to the
root node, and simplify "interrupts-extended = <&gic ...>" to
"interrupts = <...>".

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/87v7l88oa9.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index b66cd7c90d53f74d792c0a4df7a2dc7dab7ad137..8a0b482dc8e06965515440099e87cc3d211bb7fa 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -14,6 +14,7 @@
        compatible = "renesas,r8a77995";
        #address-cells = <2>;
        #size-cells = <2>;
+       interrupt-parent = <&gic>;
 
        /*
         * The external audio clocks are configured as 0 Hz fixed frequency
@@ -70,7 +71,7 @@
 
        pmu_a53 {
                compatible = "arm,cortex-a53-pmu";
-               interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -86,7 +87,6 @@
 
        soc {
                compatible = "simple-bus";
-               interrupt-parent = <&gic>;
                bootph-all;
 
                #address-cells = <2>;
@@ -1479,10 +1479,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
-                                     <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
                interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
        };
 };