return 0;
}
-void ar9_fw_ver(unsigned int *major, unsigned int *minor)
+static void ar9_fw_ver(unsigned int *major, unsigned int *minor)
{
ASSERT(major != NULL, "pointer is NULL");
ASSERT(minor != NULL, "pointer is NULL");
*minor = FW_VER_ID->minor;
}
-int ar9_init(struct platform_device *pdev)
+static int ar9_init(struct platform_device *pdev)
{
init_pmu();
reset_ppe(pdev);
return 0;
}
-void ar9_shutdown(void)
+static void ar9_shutdown(void)
{
ltq_pmu_disable(IFX_PMU_MODULE_PPE_SLL01 |
IFX_PMU_MODULE_PPE_TC |
IFX_PMU_MODULE_DSL_DFE);
}
-int ar9_start(int pp32)
+static int ar9_start(int pp32)
{
int ret;
return 0;
}
-void ar9_stop(int pp32)
+static void ar9_stop(int pp32)
{
IFX_REG_W32(DBG_CTRL_STOP, PP32_DBG_CTRL(0));
}
{
}
-int danube_start(int pp32)
+static int danube_start(int pp32)
{
int ret;
return 0;
}
-void danube_stop(int pp32)
+static void danube_stop(int pp32)
{
IFX_REG_W32(DBG_CTRL_STOP_SET(1), PP32_DBG_CTRL);
}