arm64: dts: qcom: Add PCIe3 and PCIe5 regulators for HAMAO-IOT-EVK board

HAMAO IoT EVK uses PCIe5 to connect an SDX65 module for WWAN functionality
and PCIe3 to connect a SATA controller. These interfaces require multiple
voltage rails: PCIe5 needs 3.3V supplied by vreg_wwan, while PCIe3 requires
12V, 3.3V, and 3.3V AUX rails, controlled via PMIC GPIOs.

Add the required fixed regulators with related pin configuration, and
connect them to the PCIe3 and PCIe5 ports to ensure proper power for the
SDX65 module and SATA controller.

Move reset and wake GPIO properties from RC nodes to port nodes.

Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260109104504.3147745-4-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
index 898b92627f84462fd41d515d3c4d9362e686d327..07378ee183f92c46c033e3210c4a768c7246b574 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts
@@ -253,6 +253,48 @@
                regulator-boot-on;
        };
 
+       vreg_pcie_12v: regulator-pcie-12v {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VREG_PCIE_12V";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+
+               gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&pcie_x8_12v>;
+               pinctrl-names = "default";
+       };
+
+       vreg_pcie_3v3: regulator-pcie-3v3 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VREG_PCIE_3P3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&pmc8380_3_gpios 6 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&pm_sde7_main_3p3_en>;
+               pinctrl-names = "default";
+       };
+
+       vreg_pcie_3v3_aux: regulator-pcie-3v3-aux {
+               compatible = "regulator-fixed";
+
+               regulator-name = "VREG_PCIE_3P3_AUX";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&pmc8380_3_gpios 8 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-0 = <&pm_sde7_aux_3p3_en>;
+               pinctrl-names = "default";
+       };
+
        /* Left unused as the retimer is not used on this board. */
        vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
                compatible = "regulator-fixed";
@@ -920,7 +962,19 @@
        status = "okay";
 };
 
+&pcie3_port0 {
+       vpcie12v-supply = <&vreg_pcie_12v>;
+       vpcie3v3-supply = <&vreg_pcie_3v3>;
+       vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
+
+       reset-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
+};
+
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -937,10 +991,24 @@
        };
 };
 
+&pcie5 {
+       vddpe-3v3-supply = <&vreg_wwan>;
+};
+
+&pcie5_port0 {
+       reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+};
+
 &pcie6a {
        vddpe-3v3-supply = <&vreg_nvme>;
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";
@@ -961,6 +1029,17 @@
        };
 };
 
+&pm8550ve_8_gpios {
+       pcie_x8_12v: pcie-12v-default-state {
+               pins = "gpio8";
+               function = "normal";
+               output-enable;
+               output-high;
+               bias-pull-down;
+               power-source = <0>;
+       };
+};
+
 &pm8550ve_9_gpios {
        usb0_1p8_reg_en: usb0-1p8-reg-en-state {
                pins = "gpio8";
@@ -1025,6 +1104,24 @@
        };
 };
 
+&pmc8380_3_gpios {
+       pm_sde7_aux_3p3_en: pcie-aux-3p3-default-state {
+               pins = "gpio8";
+               function = "normal";
+               output-enable;
+               bias-pull-down;
+               power-source = <0>;
+       };
+
+       pm_sde7_main_3p3_en: pcie-main-3p3-default-state {
+               pins = "gpio6";
+               function = "normal";
+               output-enable;
+               bias-pull-down;
+               power-source = <0>;
+       };
+};
+
 &pmc8380_5_gpios {
        usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state {
                pins = "gpio8";

diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
index 81866f94fe01806953afa87a9e05d4594e0fea5e..b8e3e04a6fbd489f66bb44a02aba7b9746f30fe2 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
@@ -405,9 +405,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -436,9 +433,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie6a_default>;
        pinctrl-names = "default";