]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r8a779h0: Add WWDT nodes
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Mon, 15 Dec 2025 03:47:20 +0000 (12:47 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 5 Jan 2026 13:37:18 +0000 (14:37 +0100)
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-14-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a779h0.dtsi

index 4dc0e5304f7211d95a249fd5af07f1d9b513fcc1..74bc4c4854ecae8affb46972dd121bf1e082098e 100644 (file)
                        };
                };
 
+               wwdt0: watchdog@ffc90000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffc90000 0 0x10>;
+                       interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1200>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt1: watchdog@ffca0000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffca0000 0 0x10>;
+                       interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1201>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt2: watchdog@ffcb0000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffcb0000 0 0x10>;
+                       interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1202>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt3: watchdog@ffcc0000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffcc0000 0 0x10>;
+                       interrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1203>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt4: watchdog@ffcf0000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffcf0000 0 0x10>;
+                       interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1204>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt5: watchdog@ffef0000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xffef0000 0 0x10>;
+                       interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1205>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt6: watchdog@fff10000 {
+                       compatible = "renesas,r8a779h0-wwdt",
+                                    "renesas,rcar-gen4-wwdt";
+                       reg = <0 0xfff10000 0 0x10>;
+                       interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A779H0_CLK_R>,
+                                <&cpg CPG_CORE R8A779H0_CLK_SASYNCRT>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
+                       resets = <&cpg 1206>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
                prr: chipid@fff00044 {
                        compatible = "renesas,prr";
                        reg = <0 0xfff00044 0 4>;