RISC-V: Add assert for insn operand out of range access [PR117878][NFC]

According to the the initial analysis of PR117878, the ice comes from
the out-of-range operand access for recog_data.operand[].  Thus, add
one assert here to expose this explicitly.

	PR target/117878

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (vlmax_avl_type_p): Add assert for
	out of range access.
	(nonvlmax_avl_type_p): Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 33df1518d4a9153a0f4b41aeffd18a28089b2ce9..d95fb893c82ab07a00788b8c8031569148844991 100644 (file)
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -4966,6 +4966,9 @@ vlmax_avl_type_p (rtx_insn *rinsn)
   int index = get_attr_avl_type_idx (rinsn);
   if (index == INVALID_ATTRIBUTE)
     return false;
+
+  gcc_assert (index < recog_data.n_operands);
+
   rtx avl_type = recog_data.operand[index];
   return INTVAL (avl_type) == VLMAX;
 }
@@ -5014,6 +5017,9 @@ nonvlmax_avl_type_p (rtx_insn *rinsn)
   int index = get_attr_avl_type_idx (rinsn);
   if (index == INVALID_ATTRIBUTE)
     return false;
+
+  gcc_assert (index < recog_data.n_operands);
+
   rtx avl_type = recog_data.operand[index];
   return INTVAL (avl_type) == NONVLMAX;
 }