arm64: dts: freescale: imx: Drop CPU masks from GICv3 PPI interrupts

Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Drop the masks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index f2e1854f38a0a83927f19d0f8630a9d0e5f81aa1..2a82e656b9fb23a0ac4b8eeddb409fa74a54af04 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -220,16 +220,15 @@
 
        pmu {
                compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_PPI 7
-                            (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* Physical Non-Secure */
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* Virtual */
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* Hypervisor */
                clock-frequency = <8000000>;
                arm,no-tick-in-suspend;
        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 3199bc0966b039057b54b28ffc3522f7854c12bd..79b169b07c4fc95df46815e4218ca88d4b5f06e3 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -215,8 +215,7 @@
 
        pmu {
                compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_PPI 7
-                            (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -258,10 +257,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <8000000>;
                arm,no-tick-in-suspend;
        };

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 9b2b3a9bf9e80ca836d63b4d4d3801f859fc19d6..90d7bb8f5619e50d9fd65bcf18c083affe15e6f9 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -310,8 +310,7 @@
 
        pmu {
                compatible = "arm,cortex-a53-pmu";
-               interrupts = <GIC_PPI 7
-                            (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -397,10 +396,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <8000000>;
                arm,no-tick-in-suspend;
        };

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 9b5d987665129e0c86734f90da3dde750305f387..1de3ad60c6aa7791ba6833df32fc57e650d3f610 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -86,8 +86,7 @@
        pmu {
                compatible = "arm,cortex-a35-pmu";
                interrupt-parent = <&gic>;
-               interrupts = <GIC_PPI 7
-                            (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-affinity = <&A35_0>, <&A35_1>;
        };
 

diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
index 5a8813df6bc993d559fb0b20fc742a106bfe6315..46a5d2df074d5813523eae2ce2431c9212e08deb 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi
@@ -69,7 +69,7 @@
 
        pmu {
                compatible = "arm,cortex-a55-pmu";
-               interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -79,10 +79,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <24000000>;
                arm,no-tick-in-suspend;
                interrupt-parent = <&gic>;

diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts/freescale/imx94.dtsi
index 38488147a3ef2f3e9c19e0ad14de2b98d85639d2..04c562eddc3b8c8ae6ca702253bef3a3e4ff21be 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx94.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx94.dtsi
@@ -120,7 +120,7 @@
 
        pmu {
                compatible = "arm,cortex-a55-pmu";
-               interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -130,10 +130,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <24000000>;
                interrupt-parent = <&gic>;
                arm,no-tick-in-suspend;

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 5f61866e9df9e82301c624e6074efe1c00137912..acb10bc14dd46b2b13c1e47829a5a8e7a76432ae 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -398,7 +398,7 @@
 
        pmu {
                compatible = "arm,cortex-a55-pmu";
-               interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        thermal_zones: thermal-zones {
@@ -475,10 +475,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <24000000>;
                arm,no-tick-in-suspend;
                interrupt-parent = <&gic>;

diff --git a/arch/arm64/boot/dts/freescale/imx952.dtsi b/arch/arm64/boot/dts/freescale/imx952.dtsi
index 0f86b5626cdd813c205f90c22abbc34ab0cee7d6..b26e6e3dc7738dd63b04f83ea32247e88ecb711a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx952.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx952.dtsi
@@ -285,7 +285,7 @@
 
        pmu {
                compatible = "arm,cortex-a55-pmu";
-               interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        psci {
@@ -295,10 +295,10 @@
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
-                            <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
                clock-frequency = <24000000>;
                arm,no-tick-in-suspend;
                interrupt-parent = <&gic>;