hwmon: (pmbus/ibm-cffps) Fix write bits for LED control

[ Upstream commit 76b72736f574ec38b3e94603ea5f74b1853f26b0 ]

When doing a PMBus write for the LED control on the IBM Common Form
Factor Power Supplies (ibm-cffps), the DAh command requires that bit 7
be low and bit 6 be high in order to indicate that you are truly
attempting to do a write.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Link: https://lore.kernel.org/r/20210806225131.1808759-1-bjwyman@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c
index 5668d8305b78ecbccecfd417c3c358c2bf3aa983..df712ce4b164dbe4c5a841616804c2a47d9a0df5 100644 (file)
--- a/drivers/hwmon/pmbus/ibm-cffps.c
+++ b/drivers/hwmon/pmbus/ibm-cffps.c
@@ -50,9 +50,9 @@
 #define CFFPS_MFR_VAUX_FAULT                   BIT(6)
 #define CFFPS_MFR_CURRENT_SHARE_WARNING                BIT(7)
 
-#define CFFPS_LED_BLINK                                BIT(0)
-#define CFFPS_LED_ON                           BIT(1)
-#define CFFPS_LED_OFF                          BIT(2)
+#define CFFPS_LED_BLINK                                (BIT(0) | BIT(6))
+#define CFFPS_LED_ON                           (BIT(1) | BIT(6))
+#define CFFPS_LED_OFF                          (BIT(2) | BIT(6))
 #define CFFPS_BLINK_RATE_MS                    250
 
 enum {