memory: tegra20-emc: Correct memory device mask

commit 9ff684342ee7d3ea2755c6e9b60bc43085baa3ad upstream.

Memory chip select is swapped when we read mode register, correct it.
We didn't have devices that use a single LPDDR chip and both chips are
always identical, hence this change is just a minor improvement.

Fixes: 131dd9a436d8 ("memory: tegra20-emc: Support matching timings by LPDDR2 configuration")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211222043215.28237-2-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/memory/tegra/tegra20-emc.c b/drivers/memory/tegra/tegra20-emc.c
index 2ac074b96f8593fd48eb22d421b51bbcd17fe19b..636ed37a4f666a3836e159b6db38bf0696d0105f 100644 (file)
--- a/drivers/memory/tegra/tegra20-emc.c
+++ b/drivers/memory/tegra/tegra20-emc.c
@@ -540,7 +540,7 @@ static int emc_read_lpddr_mode_register(struct tegra_emc *emc,
                                        unsigned int register_addr,
                                        unsigned int *register_data)
 {
-       u32 memory_dev = emem_dev + 1;
+       u32 memory_dev = emem_dev ? 1 : 2;
        u32 val, mr_mask = 0xff;
        int err;