arm64: dts: qcom: sc7180: Use the header with DSI phy clock IDs

Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-11-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 87c432c12a240f8035753ad10ce8662584a3f1f3..d157863dbc4a18b6861060579a148632f8ae9e3a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -6,6 +6,7 @@
  */
 
 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
@@ -3284,8 +3285,10 @@
                                              "iface",
                                              "bus";
 
-                               assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
+                               assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                operating-points-v2 = <&dsi_opp_table>;
                                power-domains = <&rpmhpd SC7180_CX>;
@@ -3433,8 +3436,8 @@
                        reg = <0 0x0af00000 0 0x200000>;
                        clocks = <&rpmhcc RPMH_CXO_CLK>,
                                 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi0_phy 1>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
                                 <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
                                 <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
                        clock-names = "bi_tcxo",