};
#endif
+#if LJ_TARGET_ARM && LJ_TARGET_LINUX
+#include <sys/utsname.h>
+#endif
+
/* Arch-dependent CPU detection. */
static uint32_t jit_cpudetect(lua_State *L)
{
#endif
#endif
#elif LJ_TARGET_ARM
- /* NYI */
+ /* Compile-time ARM CPU detection. */
+#if __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
+ flags |= JIT_F_ARMV6|JIT_F_ARMV6T2|JIT_F_ARMV7;
+#elif __ARM_ARCH_6T2__
+ flags |= JIT_F_ARMV6|JIT_F_ARMV6T2;
+#elif __ARM_ARCH_6__ || __ARM_ARCH_6J__ || __ARM_ARCH_6Z__ || __ARM_ARCH_6ZK__
+ flags |= JIT_F_ARMV6;
+#endif
+ /* Runtime ARM CPU detection. */
+#if LJ_TARGET_LINUX
+ if (!(flags & JIT_F_ARMV7)) {
+ struct utsname ut;
+ uname(&ut);
+ if (strncmp(ut.machine, "armv", 4) == 0) {
+ if (ut.machine[4] >= '7')
+ flags |= JIT_F_ARMV6|JIT_F_ARMV6T2|JIT_F_ARMV7;
+ else if (ut.machine[4] == '6')
+ flags |= JIT_F_ARMV6;
+ }
+ }
+#endif
#elif LJ_TARGET_PPC
/* Nothing to do. */
#else
{
uint32_t r;
#if __ARM_ARCH_6__ || __ARM_ARCH_6J__ || __ARM_ARCH_6T2__ || __ARM_ARCH_6Z__ ||\
- __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
+ __ARM_ARCH_6ZK__ || __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
__asm__("rev %0, %1" : "=r" (r) : "r" (x));
return r;
#else
/* Names for the CPU-specific flags. Must match the order above. */
#define JIT_F_CPU_FIRST JIT_F_CMOV
#define JIT_F_CPUSTRING "\4CMOV\4SSE2\4SSE3\6SSE4.1\2P4\3AMD\2K8\4ATOM"
+#elif LJ_TARGET_ARM
+#define JIT_F_ARMV6 0x00000010
+#define JIT_F_ARMV6T2 0x00000020
+#define JIT_F_ARMV7 0x00000040
+
+/* Names for the CPU-specific flags. Must match the order above. */
+#define JIT_F_CPU_FIRST JIT_F_ARMV6
+#define JIT_F_CPUSTRING "\5ARMv6\7ARMv6T2\5ARMv7"
#else
#define JIT_F_CPU_FIRST 0
#define JIT_F_CPUSTRING ""