]> git.ipfire.org Git - thirdparty/LuaJIT.git/commitdiff
ARM: Add CPU detection.
authorMike Pall <mike>
Thu, 26 May 2011 15:58:29 +0000 (17:58 +0200)
committerMike Pall <mike>
Thu, 26 May 2011 15:58:29 +0000 (17:58 +0200)
src/lib_jit.c
src/lj_def.h
src/lj_jit.h

index 259a03e1d34ef4ef72ce3175b6db773b40b5b2b6..6e16d45b82df9d08c4edda14cf4b1a2c97b9f6d1 100644 (file)
@@ -520,6 +520,10 @@ JIT_PARAMDEF(JIT_PARAMINIT)
 };
 #endif
 
+#if LJ_TARGET_ARM && LJ_TARGET_LINUX
+#include <sys/utsname.h>
+#endif
+
 /* Arch-dependent CPU detection. */
 static uint32_t jit_cpudetect(lua_State *L)
 {
@@ -563,7 +567,27 @@ static uint32_t jit_cpudetect(lua_State *L)
 #endif
 #endif
 #elif LJ_TARGET_ARM
-  /* NYI */
+  /* Compile-time ARM CPU detection. */
+#if __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
+  flags |= JIT_F_ARMV6|JIT_F_ARMV6T2|JIT_F_ARMV7;
+#elif __ARM_ARCH_6T2__
+  flags |= JIT_F_ARMV6|JIT_F_ARMV6T2;
+#elif __ARM_ARCH_6__ || __ARM_ARCH_6J__ || __ARM_ARCH_6Z__ || __ARM_ARCH_6ZK__
+  flags |= JIT_F_ARMV6;
+#endif
+  /* Runtime ARM CPU detection. */
+#if LJ_TARGET_LINUX
+  if (!(flags & JIT_F_ARMV7)) {
+    struct utsname ut;
+    uname(&ut);
+    if (strncmp(ut.machine, "armv", 4) == 0) {
+      if (ut.machine[4] >= '7')
+       flags |= JIT_F_ARMV6|JIT_F_ARMV6T2|JIT_F_ARMV7;
+      else if (ut.machine[4] == '6')
+       flags |= JIT_F_ARMV6;
+    }
+  }
+#endif
 #elif LJ_TARGET_PPC
   /* Nothing to do. */
 #else
index 86f041a4c1ecb21758b8eab94f3c73a2f8e66911..197df291c1bcf35dd39a717d41c3c81f4e75ac7d 100644 (file)
@@ -136,7 +136,7 @@ static LJ_AINLINE uint32_t lj_bswap(uint32_t x)
 {
   uint32_t r;
 #if __ARM_ARCH_6__ || __ARM_ARCH_6J__ || __ARM_ARCH_6T2__ || __ARM_ARCH_6Z__ ||\
-    __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
+    __ARM_ARCH_6ZK__ || __ARM_ARCH_7__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__
   __asm__("rev %0, %1" : "=r" (r) : "r" (x));
   return r;
 #else
index 63584355184b478033f827184c61f045dd70c1db..ea2dd4adaf0c6e4dd28ead54cc23615eb5404068 100644 (file)
 /* Names for the CPU-specific flags. Must match the order above. */
 #define JIT_F_CPU_FIRST                JIT_F_CMOV
 #define JIT_F_CPUSTRING                "\4CMOV\4SSE2\4SSE3\6SSE4.1\2P4\3AMD\2K8\4ATOM"
+#elif LJ_TARGET_ARM
+#define JIT_F_ARMV6            0x00000010
+#define JIT_F_ARMV6T2          0x00000020
+#define JIT_F_ARMV7            0x00000040
+
+/* Names for the CPU-specific flags. Must match the order above. */
+#define JIT_F_CPU_FIRST                JIT_F_ARMV6
+#define JIT_F_CPUSTRING                "\5ARMv6\7ARMv6T2\5ARMv7"
 #else
 #define JIT_F_CPU_FIRST                0
 #define JIT_F_CPUSTRING                ""