#include "gdb_proc_service.h"
#include "arch-utils.h"
+#include "arch/aarch64-gcs-linux.h"
#include "arch/aarch64-mte-linux.h"
#include "nat/aarch64-mte-linux-ptrace.h"
perror_with_name (_("unable to store TLS register"));
}
+/* Fill GDB's register array with the GCS register values from
+ the current thread. */
+
+static void
+fetch_gcsregs_from_thread (struct regcache *regcache)
+{
+ aarch64_gdbarch_tdep *tdep
+ = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
+
+ gdb_assert (tdep->gcs_reg_base != -1);
+ gdb_assert (tdep->gcs_linux_reg_base != -1);
+
+ struct user_gcs user_gcs;
+ struct iovec iovec;
+
+ iovec.iov_base = &user_gcs;
+ iovec.iov_len = sizeof (user_gcs);
+
+ int tid = get_ptrace_pid (regcache->ptid ());
+ if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_GCS, &iovec) != 0)
+ perror_with_name (_("unable to fetch GCS registers"));
+
+ regcache->raw_supply (tdep->gcs_reg_base, &user_gcs.gcspr_el0);
+ regcache->raw_supply (tdep->gcs_linux_reg_base, &user_gcs.features_enabled);
+ regcache->raw_supply (tdep->gcs_linux_reg_base + 1,
+ &user_gcs.features_locked);
+}
+
+/* Store to the current thread the valid GCS register set in the GDB's
+ register array. */
+
+static void
+store_gcsregs_to_thread (struct regcache *regcache)
+{
+ aarch64_gdbarch_tdep *tdep
+ = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
+
+ gdb_assert (tdep->gcs_reg_base != -1);
+ gdb_assert (tdep->gcs_linux_reg_base != -1);
+
+ if (REG_VALID != regcache->get_register_status (tdep->gcs_reg_base)
+ || REG_VALID != regcache->get_register_status (tdep->gcs_linux_reg_base)
+ || REG_VALID
+ != regcache->get_register_status (tdep->gcs_linux_reg_base + 1))
+ return;
+
+ struct user_gcs user_gcs;
+ regcache->raw_collect (tdep->gcs_reg_base, &user_gcs.gcspr_el0);
+ regcache->raw_collect (tdep->gcs_linux_reg_base, &user_gcs.features_enabled);
+ regcache->raw_collect (tdep->gcs_linux_reg_base + 1,
+ &user_gcs.features_locked);
+
+ struct iovec iovec;
+ iovec.iov_base = &user_gcs;
+ iovec.iov_len = sizeof (user_gcs);
+
+ int tid = get_ptrace_pid (regcache->ptid ());
+ if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_GCS, &iovec) != 0)
+ perror_with_name (_("unable to store GCS registers"));
+}
+
/* The AArch64 version of the "fetch_registers" target_ops method. Fetch
REGNO from the target and place the result into REGCACHE. */
if (tdep->has_sme2 ())
fetch_zt_from_thread (regcache);
+
+ if (tdep->has_gcs ())
+ fetch_gcsregs_from_thread (regcache);
}
/* General purpose register? */
else if (regno < AARCH64_V0_REGNUM)
&& regno >= tdep->tls_regnum_base
&& regno < tdep->tls_regnum_base + tdep->tls_register_count)
fetch_tlsregs_from_thread (regcache);
+ /* GCS register? */
+ else if (tdep->has_gcs ()
+ && (regno == tdep->gcs_reg_base || regno == tdep->gcs_linux_reg_base
+ || regno == tdep->gcs_linux_reg_base + 1))
+ fetch_gcsregs_from_thread (regcache);
}
/* A version of the "fetch_registers" target_ops method used when running
if (tdep->has_sme2 ())
store_zt_to_thread (regcache);
+
+ if (tdep->has_gcs ())
+ store_gcsregs_to_thread (regcache);
}
/* General purpose register? */
else if (regno < AARCH64_V0_REGNUM)
&& regno >= tdep->tls_regnum_base
&& regno < tdep->tls_regnum_base + tdep->tls_register_count)
store_tlsregs_to_thread (regcache);
+ /* GCS register? */
+ else if (tdep->has_gcs ()
+ && (regno == tdep->gcs_reg_base || regno == tdep->gcs_linux_reg_base
+ || regno == tdep->gcs_linux_reg_base + 1))
+ store_gcsregs_to_thread (regcache);
/* PAuth registers are read-only. */
}
active or not. */
features.vq = aarch64_sve_get_vq (tid);
features.pauth = hwcap & AARCH64_HWCAP_PACA;
+ features.gcs = features.gcs_linux = hwcap & HWCAP_GCS;
features.mte = hwcap2 & HWCAP2_MTE;
features.tls = aarch64_tls_register_count (tid);
/* SME feature check. */
#include "record-full.h"
#include "linux-record.h"
+#include "arch/aarch64-gcs-linux.h"
#include "arch/aarch64-mte.h"
#include "arch/aarch64-mte-linux.h"
#include "arch/aarch64-scalable-linux.h"
cb (".reg-aarch-tls", sizeof_tls_regset, sizeof_tls_regset,
&aarch64_linux_tls_regset, "TLS register", cb_data);
}
+
+ /* Handle GCS registers. */
+ if (tdep->has_gcs ())
+ {
+ /* Create this on the fly in order to handle the variable regnums. */
+ const struct regcache_map_entry gcs_regmap[] =
+ {
+ { 1, tdep->gcs_linux_reg_base, 8 }, /* features_enabled */
+ { 1, tdep->gcs_linux_reg_base + 1, 8 }, /* features_locked */
+ { 1, tdep->gcs_reg_base, 8 }, /* GCSPR */
+ { 0 }
+ };
+
+ const struct regset aarch64_linux_gcs_regset =
+ {
+ gcs_regmap, regcache_supply_regset, regcache_collect_regset
+ };
+
+ cb (".reg-aarch-gcs", sizeof (struct user_gcs), sizeof (struct user_gcs),
+ &aarch64_linux_gcs_regset, "GCS registers", cb_data);
+ }
}
/* Implement the "core_read_description" gdbarch method. */
length. */
features.vq = aarch64_linux_core_read_vq_from_sections (gdbarch, abfd);
features.pauth = hwcap & AARCH64_HWCAP_PACA;
+ features.gcs = features.gcs_linux = hwcap & HWCAP_GCS;
features.mte = hwcap2 & HWCAP2_MTE;
/* Handle the TLS section. */
"tag_ctl"
};
+static const char *const aarch64_gcs_register_names[] = {
+ /* Guarded Control Stack Pointer Register. */
+ "gcspr"
+};
+
+static const char *const aarch64_gcs_linux_register_names[] = {
+ /* Field in struct user_gcs. */
+ "gcs_features_enabled",
+ /* Field in struct user_gcs. */
+ "gcs_features_locked",
+};
+
static int aarch64_stack_frame_destroyed_p (struct gdbarch *, CORE_ADDR);
/* AArch64 prologue cache structure. */
}
}
+/* Push LR_VALUE to the Guarded Control Stack. */
+
+static void
+aarch64_push_gcs_entry (regcache *regs, CORE_ADDR lr_value)
+{
+ gdbarch *arch = regs->arch ();
+ aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (arch);
+ CORE_ADDR gcs_addr;
+
+ enum register_status status = regs->cooked_read (tdep->gcs_reg_base,
+ &gcs_addr);
+ if (status != REG_VALID)
+ error ("Can't read $gcspr.");
+
+ gcs_addr -= 8;
+ gdb_byte buf[8];
+ store_integer (buf, gdbarch_byte_order (arch), lr_value);
+ if (target_write_memory (gcs_addr, buf, sizeof (buf)) != 0)
+ error ("Can't write to Guarded Control Stack.");
+
+ /* Update GCSPR. */
+ regcache_cooked_write_unsigned (regs, tdep->gcs_reg_base, gcs_addr);
+}
+
+/* Implement the "shadow_stack_push" gdbarch method. */
+
+static void
+aarch64_shadow_stack_push (gdbarch *gdbarch, CORE_ADDR new_addr,
+ regcache *regcache)
+{
+ aarch64_push_gcs_entry (regcache, new_addr);
+}
+
/* Implement the "push_dummy_call" gdbarch method. */
static CORE_ADDR
features.sme2 = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sme2")
!= nullptr);
+ /* Check for the GCS feature. */
+ features.gcs = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.gcs")
+ != nullptr);
+
+ /* Check for the GCS Linux feature. */
+ features.gcs_linux = (tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.gcs.linux")
+ != nullptr);
+
return features;
}
int first_w_regnum = num_pseudo_regs;
num_pseudo_regs += 31;
+ const struct tdesc_feature *feature_gcs
+ = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.gcs");
+ int first_gcs_regnum = -1;
+ /* Add the GCS registers. */
+ if (feature_gcs != nullptr)
+ {
+ first_gcs_regnum = num_regs;
+ /* Validate the descriptor provides the mandatory GCS registers and
+ allocate their numbers. */
+ for (i = 0; i < ARRAY_SIZE (aarch64_gcs_register_names); i++)
+ valid_p &= tdesc_numbered_register (feature_gcs, tdesc_data.get (),
+ first_gcs_regnum + i,
+ aarch64_gcs_register_names[i]);
+
+ num_regs += i;
+ }
+
+ if (!valid_p)
+ return nullptr;
+
+ const struct tdesc_feature *feature_gcs_linux
+ = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.gcs.linux");
+ int first_gcs_linux_regnum = -1;
+ /* Add the GCS Linux registers. */
+ if (feature_gcs_linux != nullptr)
+ {
+ first_gcs_linux_regnum = num_regs;
+ /* Validate the descriptor provides the mandatory GCS Linux registers
+ and allocate their numbers. */
+ for (i = 0; i < ARRAY_SIZE (aarch64_gcs_linux_register_names); i++)
+ valid_p &= tdesc_numbered_register (feature_gcs_linux, tdesc_data.get (),
+ first_gcs_linux_regnum + i,
+ aarch64_gcs_linux_register_names[i]);
+
+ /* This feature depends on the GCS feature. */
+ valid_p &= feature_gcs != nullptr;
+
+ num_regs += i;
+ }
+
if (!valid_p)
return nullptr;
tdep->mte_reg_base = first_mte_regnum;
tdep->tls_regnum_base = first_tls_regnum;
tdep->tls_register_count = tls_register_count;
+ tdep->gcs_reg_base = first_gcs_regnum;
+ tdep->gcs_linux_reg_base = first_gcs_linux_regnum;
/* Set the SME register set details. The pseudo-registers will be adjusted
later. */
set_gdbarch_get_pc_address_flags (gdbarch, aarch64_get_pc_address_flags);
+ if (tdep->has_gcs ())
+ set_gdbarch_shadow_stack_push (gdbarch, aarch64_shadow_stack_push);
+
tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
/* Fetch the updated number of registers after we're done adding all
pulongest (tdep->sme_tile_pseudo_base));
gdb_printf (file, _("aarch64_dump_tdep: sme_svq = %s\n"),
pulongest (tdep->sme_svq));
+
+ gdb_printf (file, _ ("aarch64_dump_tdep: gcs_reg_base = %d\n"),
+ tdep->gcs_reg_base);
}
#if GDB_SELF_TEST
{
return sme2_zt0_regnum > 0;
}
+
+ /* First GCS register. This is -1 if no GCS registers are available. */
+ int gcs_reg_base = -1;
+
+ /* First GCS Linux-specific register. This is -1 if no GCS Linux feature is
+ available. */
+ int gcs_linux_reg_base = -1;
+
+ /* Returns true if the target supports GCS. */
+ bool
+ has_gcs () const
+ {
+ return gcs_reg_base != -1;
+ }
};
const target_desc *aarch64_read_description (const aarch64_features &features);
--- /dev/null
+/* Common Linux target-dependent definitions for AArch64 GCS
+
+ Copyright (C) 2025 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
+
+#ifndef ARCH_AARCH64_GCS_LINUX_H
+#define ARCH_AARCH64_GCS_LINUX_H
+
+#include <stdint.h>
+
+/* Feature check for Guarded Control Stack. */
+#ifndef HWCAP_GCS
+#define HWCAP_GCS (1UL << 32)
+#endif
+
+/* Make sure we only define these if the kernel header doesn't. */
+#ifndef GCS_MAGIC
+
+/* GCS state (NT_ARM_GCS). */
+
+struct user_gcs
+{
+ uint64_t features_enabled;
+ uint64_t features_locked;
+ uint64_t gcspr_el0;
+};
+
+#endif /* GCS_MAGIC */
+
+#endif /* ARCH_AARCH64_GCS_LINUX_H */
#include "../features/aarch64-sme.c"
#include "../features/aarch64-sme2.c"
#include "../features/aarch64-tls.c"
+#include "../features/aarch64-gcs.c"
+#include "../features/aarch64-gcs-linux.c"
/* See arch/aarch64.h. */
if (features.sme2)
regnum = create_feature_aarch64_sme2 (tdesc.get (), regnum);
+ if (features.gcs)
+ regnum = create_feature_aarch64_gcs (tdesc.get (), regnum);
+
+ if (features.gcs_linux)
+ regnum = create_feature_aarch64_gcs_linux (tdesc.get (), regnum);
+
return tdesc.release ();
}
/* Whether SME2 is supported. */
bool sme2 = false;
+
+ /* Whether Guarded Control Stack is supported. */
+ bool gcs = false;
+
+ /* Whether Guarded Control Stack Linux features are supported. */
+ bool gcs_linux = false;
};
inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
&& lhs.mte == rhs.mte
&& lhs.tls == rhs.tls
&& lhs.svq == rhs.svq
- && lhs.sme2 == rhs.sme2;
+ && lhs.sme2 == rhs.sme2
+ && lhs.gcs == rhs.gcs
+ && lhs.gcs_linux == rhs.gcs_linux;
}
namespace std
messages depending on whether the synchronous or asynchronous mode is selected.
@xref{Memory Tagging}. @xref{Memory}.
+@subsubsection Guarded Control Stack
+@cindex AArch64 GCS
+@cindex AArch64 Guarded Control Stack
+
+When @value{GDBN} is debugging the AArch64 architecture, the program is
+using the feature Guarded Control Stack (GCS) and there is support in the
+kernel for GCS, @value{GDBN} will make a couple of special registers ---
+@code{gcs_features_enabled} and @code{gcs_features_locked} --- available
+through the @code{org.gnu.gdb.aarch64.gcs.linux} feature. These registers
+expose some options that can be controlled at runtime and emulate the
+@code{prctl} option @code{PR_SET_SHADOW_STACK_STATUS}. For further
+information, see the
+@uref{https://www.kernel.org/doc/html/latest/arch/arm64/gcs.html,ignored,
+documentation} in the Linux kernel.
+
@node x86
@subsection x86
Extra registers are allowed in this feature, but they will not affect
@value{GDBN}.
+@subsubsection GCS registers
+
+The @samp{org.gnu.gdb.aarch64.gcs} feature is optional. If present, it
+means the target supports Guarded Control Stacks and must contain the
+following register:
+
+@itemize @minus
+
+@item
+@code{gcspr}, which points to the thread's Guarded Control Stack. It is 64
+bits in size and has a type of @samp{data_ptr}.
+
+@end itemize
+
+The @samp{org.gnu.gdb.aarch64.gcs.linux} feature is optional. If present,
+then the @samp{org.gnu.gdb.aarch64.gcs} feature must also be present. The
+@samp{org.gnu.gdb.aarch64.gcs.linux} feature represents facilities provided
+by the Linux kernel for GCS support and should contain the following:
+
+@itemize @minus
+
+@item
+@code{gcs_features_enabled} shows the features currently enabled via the
+prctl or ptrace system calls. It is represented as if it were a 64-bit
+register with a custom flags type.
+
+@item
+@code{gcs_features_locked} shows the features currently locked via the
+prctl or ptrace system calls. It is represented as if it were a 64-bit
+register with a custom flags type.
+
+@end itemize
+
+Extra registers are allowed in these features, but they will not affect
+@value{GDBN}.
+
@node ARC Features
@subsection ARC Features
@cindex target descriptions, ARC Features
aarch64-fpu.xml \
aarch64-pauth.xml \
aarch64-mte.xml \
+ aarch64-gcs.xml \
+ aarch64-gcs-linux.xml \
arc/v1-core.xml \
arc/v1-aux.xml \
arc/v2-core.xml \
--- /dev/null
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: aarch64-gcs-linux.xml */
+
+#include "gdbsupport/tdesc.h"
+
+static int
+create_feature_aarch64_gcs_linux (struct target_desc *result, long regnum)
+{
+ struct tdesc_feature *feature;
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.gcs.linux");
+ tdesc_type_with_fields *type_with_fields;
+ type_with_fields = tdesc_create_flags (feature, "features_flags", 8);
+ tdesc_add_flag (type_with_fields, 0, "PR_SHADOW_STACK_ENABLE");
+ tdesc_add_flag (type_with_fields, 1, "PR_SHADOW_STACK_WRITE");
+ tdesc_add_flag (type_with_fields, 2, "PR_SHADOW_STACK_PUSH");
+
+ tdesc_create_reg (feature, "gcs_features_enabled", regnum++, 1, "system", 64, "features_flags");
+ tdesc_create_reg (feature, "gcs_features_locked", regnum++, 1, "system", 64, "features_flags");
+ return regnum;
+}
--- /dev/null
+<?xml version="1.0"?>
+<!-- Copyright (C) 2025 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.aarch64.gcs.linux">
+ <flags id="features_flags" size="8">
+ <field name="PR_SHADOW_STACK_ENABLE" start="0" end="0"/>
+ <field name="PR_SHADOW_STACK_WRITE" start="1" end="1"/>
+ <field name="PR_SHADOW_STACK_PUSH" start="2" end="2"/>
+ </flags>
+
+ <reg name="gcs_features_enabled" bitsize="64" type="features_flags" group="system"/>
+ <reg name="gcs_features_locked" bitsize="64" type="features_flags" group="system"/>
+</feature>
--- /dev/null
+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
+ Original: aarch64-gcs.xml */
+
+#include "gdbsupport/tdesc.h"
+
+static int
+create_feature_aarch64_gcs (struct target_desc *result, long regnum)
+{
+ struct tdesc_feature *feature;
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.aarch64.gcs");
+ tdesc_create_reg (feature, "gcspr", regnum++, 1, "system", 64, "data_ptr");
+ return regnum;
+}
--- /dev/null
+<?xml version="1.0"?>
+<!-- Copyright (C) 2025 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.aarch64.gcs">
+ <reg name="gcspr" bitsize="64" type="data_ptr" group="system"/>
+</feature>
#include "gdb_proc_service.h"
#include "arch/aarch64.h"
+#include "arch/aarch64-gcs-linux.h"
#include "arch/aarch64-mte-linux.h"
#include "arch/aarch64-scalable-linux.h"
#include "linux-aarch32-tdesc.h"
supply_register (regcache, *regnum, tls_buf + sizeof (uint64_t));
}
+/* Fill BUF with GCS register from the regcache. */
+
+static void
+aarch64_fill_gcsregset (struct regcache *regcache, void *buf)
+{
+ struct user_gcs *regset = (struct user_gcs *) buf;
+ int gcspr_regnum = find_regno (regcache->tdesc, "gcspr");
+ int features_enabled_regnum = find_regno (regcache->tdesc,
+ "gcs_features_enabled");
+ int features_locked_regnum = find_regno (regcache->tdesc,
+ "gcs_features_locked");
+
+ collect_register (regcache, gcspr_regnum, ®set->gcspr_el0);
+ collect_register (regcache, features_enabled_regnum,
+ ®set->features_enabled);
+ collect_register (regcache, features_locked_regnum, ®set->features_locked);
+}
+
+/* Store GCS register to regcache. */
+
+static void
+aarch64_store_gcsregset (struct regcache *regcache, const void *buf)
+{
+ const struct user_gcs *regset = (const struct user_gcs *) buf;
+ int gcspr_regnum = find_regno (regcache->tdesc, "gcspr");
+ int features_enabled_regnum = find_regno (regcache->tdesc,
+ "gcs_features_enabled");
+ int features_locked_regnum = find_regno (regcache->tdesc,
+ "gcs_features_locked");
+
+ supply_register (regcache, gcspr_regnum, ®set->gcspr_el0);
+ supply_register (regcache, features_enabled_regnum,
+ ®set->features_enabled);
+ supply_register (regcache, features_locked_regnum, ®set->features_locked);
+}
+
bool
aarch64_target::low_supports_breakpoints ()
{
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_TLS,
0, OPTIONAL_REGS,
aarch64_fill_tlsregset, aarch64_store_tlsregset },
+ /* Guarded Control Stack registers. */
+ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_GCS,
+ 0, OPTIONAL_REGS,
+ aarch64_fill_gcsregset, aarch64_store_gcsregset },
NULL_REGSET
};
if (features.sme2)
regset->size = AARCH64_SME2_ZT0_SIZE;
break;
+ case NT_ARM_GCS:
+ if (features.gcs_linux)
+ regset->size = sizeof (struct user_gcs);
+ break;
default:
gdb_assert_not_reached ("Unknown register set found.");
}
/* A-profile MTE is 64-bit only. */
features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE;
features.tls = aarch64_tls_register_count (tid);
+ features.gcs = features.gcs_linux = linux_get_hwcap (pid, 8) & HWCAP_GCS;
/* Scalable Matrix Extension feature and size check. */
if (linux_get_hwcap2 (pid, 8) & HWCAP2_SME)