Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1b6af32cfb2c1de8f66c28828c4ec9e393c401f8..3f7e53096ae2902cfcc506c6eccfb01168e4efbe 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,58 @@
+2026-04-26  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR rtl-optimization/56096
+       * config/riscv/riscv.md: Add new patterns to optimize certain cases with
+       a logical AND feeding an equality test against zero.
+
+2026-04-25  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+       PR tree-optimization/124061
+       * tree-scalar-evolution.cc (interpret_rhs_expr): Use
+       INTEGRAL_NB_TYPE_P instead of comparing the code to INTEGER_TYPE.
+       * tree-ssa-loop-niter.cc (number_of_iterations_ne): Likewise.
+       (number_of_iterations_cltz): Likewise.
+       (number_of_iterations_exit_assumptions): Likewise.
+       * tree.h (INTEGRAL_NB_TYPE_P): New macro.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123904
+       * config/riscv/riscv.md (masking shifted value): New splitter to
+       optimize certain masking operations on shifted values.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123838
+       * config/riscv/riscv.md: Use splitters to simplify shifts where
+       the shift count is 31-N or 63-N.
+
+2026-04-25  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/predicates.md: Add ge to the swappable
+       cmp operator iterator.
+       * config/riscv/riscv-v.cc (get_swapped_cmp_rtx_code): Take
+       care of the swapped rtx code as well.
+
+2026-04-25  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+
+       PR tree-optimization/64567
+       * match.pd (`cond (bit_and A IMM) (bit_or A IMM) A`): New
+       pattern.
+       (`cond (bit_and A IMM) (bit_and A ~IMM) A`): New pattern.
+
+2026-04-25  Avinal Kumar  <avinal.xlvii@gmail.com>
+
+       PR tree-optimization/122989
+       * tree-ssa-strlen.cc (get_string_length): Use
+       gimple_convert_to_ptrofftype and gimple_build instead of
+       convert_to_ptrofftype/force_gimple_operand_gsi/gimple_build_assign.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/124984
+       * config/riscv/thead.cc (th_memidx_classify_address_index): Extract
+       constant multiplicand value from the right object.
+
 2026-04-24  Hans-Peter Nilsson  <hp@axis.com>
 
        * doc/sourcebuild.texi (Effective-Target Keywords): Document 'sleep'.

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 0964571cd054c10ba9a0d8d52b1b5e92c0f1b082..8f5381806216359f5dc6ca79f765658132babf41 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260425
+20260426

diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index c185fd6bfa3c1ed7099e5a4d67fab8a554c2c5df..a1cc6fc978d340f1128477c7d73bad7e9d3241b8 100644 (file)
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2026-04-25  Martin Uecker  <uecker@tugraz.at>
+
+       PR c/124303
+       * c-decl.cc (finish_struct): Check for consistency of
+       declarations after completing variants.
+
 2026-04-22  Jakub Jelinek  <jakub@redhat.com>
 
        PR sanitizer/124969

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 23e9a3d1435081fb2ff8ca6d37a5b7beda696c3c..cb3058bd9ac3f5abd8a21aa9a96bcd2a09e999ed 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,84 @@
+2026-04-26  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR rtl-optimization/56096
+       * gcc.target/riscv/pr56096.c: New test.
+
+2026-04-25  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+       PR tree-optimization/124061
+       * g++.dg/opt/enum-loop-1.C: New test.
+       * gcc.dg/tree-ssa/bitint-loop-opt-1.c: New test.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123904
+       * gcc.target/riscv/pr123904.c: New test.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123838
+       * gcc.target/riscv/pr123838.c: New test.
+       Co-authored-by:  Austin Law <austinklaw@gmail.com>
+
+2026-04-25  Martin Uecker  <uecker@tugraz.at>
+
+       PR c/124303
+       * gcc.dg/pr124303.c: New test.
+
+2026-04-25  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
+       for vmsle.vx.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
+       helper macros.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
+       data for run test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsle-run-1-i16.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsle-run-1-i32.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsle-run-1-i64.c: New test.
+       * gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsle-run-1-i8.c: New test.
+
+2026-04-25  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+
+       PR tree-optimization/64567
+       * gcc.dg/tree-ssa/pr64567-2.c: New test.
+       * gcc.dg/tree-ssa/pr64567.c: New test.
+
+2026-04-25  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+       * gcc.target/x86_64/abi/asm-support.S: Use .note.GNU-stack on
+       FreeBSD, too.
+       * gcc.target/x86_64/abi/avx/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/avx512f/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/avx512fp16/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/avx512fp16/m256h/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/avx512fp16/m512h/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/bf16/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/bf16/m256bf16/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/bf16/m512bf16/asm-support.S: Likewise.
+       * gcc.target/x86_64/abi/ms-sysv/do-test.S: Likewise.
+       Update comment.
+       * gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp (runtest_ms_sysv): Add
+       --omit-rbp-clobbers on FreeBSD.
+       * gcc.target/x86_64/abi/callabi/leaf-2.c (dg-options): Add
+       -fomit-frame-pointer.
+
+2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/124984
+       * gcc.target/riscv/pr124984.c: New test.
+
 2026-04-24  Hans-Peter Nilsson  <hp@axis.com>
 
        * lib/target-supports.exp (check_effective_target_sleep): New.