]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:21 +0000 (22:25 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 14 May 2021 08:49:34 +0000 (10:49 +0200)
[ Upstream commit e52dcd6e70fab51f53292e53336ecb007bb60889 ]

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/exynos4412-midas.dtsi

index d75f554efde05f21c8ef056511f5124c4e9a6a46..fc77c1bfd844e654c25a160d84c651c9c508437f 100644 (file)
        max77686: pmic@9 {
                compatible = "maxim,max77686";
                interrupt-parent = <&gpx0>;
-               interrupts = <7 IRQ_TYPE_NONE>;
+               interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-0 = <&max77686_irq>;
                pinctrl-names = "default";
                reg = <0x09>;