]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: dts: microchip: update mpfs gpio interrupts to better match the SoC
authorConor Dooley <conor.dooley@microchip.com>
Tue, 10 Feb 2026 10:51:17 +0000 (10:51 +0000)
committerConor Dooley <conor.dooley@microchip.com>
Tue, 31 Mar 2026 14:51:52 +0000 (15:51 +0100)
There are 3 GPIO controllers on this SoC, of which:
- GPIO controller 0 has 14 GPIOs
- GPIO controller 1 has 24 GPIOs
- GPIO controller 2 has 32 GPIOs

All GPIOs are capable of generating interrupts, for a total of 70.
There are only 41 IRQs available however, so a configurable mux is used
to ensure all GPIOs can be used for interrupt generation.
38 of the 41 interrupts are in what the documentation calls "direct
mode", as they provide an exclusive connection from a GPIO to the PLIC.
The 3 remaining interrupts are used to mux the interrupts which do not
have a exclusive connection, one for each GPIO controller.

The mux was overlooked when the bindings and driver were originally
written for the GPIO controllers on Polarfire SoC, and the interrupts
property in the GPIO nodes used to try and convey what the mapping was.
Instead, the mux should be a device in its own right, and the GPIO
controllers should be connected to it, rather than to the PLIC.
Now that a binding exists for that mux, fix the inaccurate description
of the interrupt controller hierarchy.

GPIO controllers 0 and 1 do not have all 32 possible GPIO lines, so
ngpios needs to be set to match the number of lines/interrupts.

The m100pfsevp has conflicting interrupt mappings for controllers 0 and
2, as they cannot both be using an interrupt in "direct mode" at the
same time, so the default replaces this impossible configuration.

Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs-beaglev-fire.dts
arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts
arch/riscv/boot/dts/microchip/mpfs-icicle-kit-common.dtsi
arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts
arch/riscv/boot/dts/microchip/mpfs-polarberry.dts
arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts
arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts
arch/riscv/boot/dts/microchip/mpfs.dtsi

index f44ad8e6f4e491648767f698cf0bb3c13a99521d..0e1b0b8d394b9026e1edcdb3be493e8670cc7ae9 100644 (file)
        };
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &mac0 {
        status = "okay";
        phy-mode = "sgmii";
index c068b9bb5bfdf8318815e4c77a94cac297c11271..f769c9d5d7b479552fc5a3dc596101a8d46c73c5 100644 (file)
 };
 
 &gpio1 {
-       interrupts = <27>, <28>, <29>, <30>,
-                    <31>, <32>, <33>, <47>,
-                    <35>, <36>, <37>, <38>,
-                    <39>, <40>, <41>, <42>,
-                    <43>, <44>, <45>, <46>,
-                    <47>, <48>, <49>, <50>;
        status = "okay";
 };
 
 &gpio2 {
-       interrupts = <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>;
        status = "okay";
 };
 
        status = "okay";
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &mac0 {
        phy-mode = "sgmii";
        phy-handle = <&phy0>;
index 888ecbb3b27593f9301cbd05691708cdb002386d..7816408343a3250f820a21d5c5dbc4a8a36333ea 100644 (file)
 };
 
 &gpio2 {
-       interrupts = <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>;
        status = "okay";
 };
 
        status = "okay";
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &mac0 {
        phy-mode = "sgmii";
        phy-handle = <&phy0>;
index a8d623ee9fa4cedacb177fbe7ebf94a5eb3df3d3..86234968df4865f9344c97c2dec3e085223cad52 100644 (file)
        status = "okay";
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &gpio0 {
-       interrupts = <13>, <14>, <15>, <16>,
-                    <17>, <18>, <19>, <20>,
-                    <21>, <22>, <23>, <24>,
-                    <25>, <26>;
        ngpios = <14>;
        status = "okay";
 
 };
 
 &gpio2 {
-       interrupts = <13>, <14>, <15>, <16>,
-                    <17>, <18>, <19>, <20>,
-                    <21>, <22>, <23>, <24>,
-                    <25>, <26>, <27>, <28>,
-                    <29>, <30>, <31>, <32>,
-                    <33>, <34>, <35>, <36>,
-                    <37>, <38>, <39>, <40>,
-                    <41>, <42>, <43>, <44>;
        status = "okay";
 };
 
index ea0808ab104255ea6cfcff1a1bc99adbbdc81905..510d59153cd07a57c22e722c62358ffbdcb61901 100644 (file)
        };
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 /*
  * phy0 is connected to mac0, but the port itself is on the (optional) carrier
  * board.
index f9a89057943834766cb60b14a70a855df416566f..8f1908a10567155bf3b88dadc53e4ca3c4f8a994 100644 (file)
        status = "okay";
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &gpio2 {
-       interrupts = <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>,
-                    <53>, <53>, <53>, <53>;
        status = "okay";
 };
 
index d1120f5f2c0153bbc9b967dd360159b6c6ee50e1..bc15530a2979b6b1877855355196002241329e1e 100644 (file)
        };
 };
 
+&irqmux {
+       interrupt-map = <0 &plic 13>, <1 &plic 14>, <2 &plic 15>,
+                       <3 &plic 16>, <4 &plic 17>, <5 &plic 18>,
+                       <6 &plic 19>, <7 &plic 20>, <8 &plic 21>,
+                       <9 &plic 22>, <10 &plic 23>, <11 &plic 24>,
+                       <12 &plic 25>, <13 &plic 26>,
+
+                       <32 &plic 27>, <33 &plic 28>, <34 &plic 29>,
+                       <35 &plic 30>, <36 &plic 31>, <37 &plic 32>,
+                       <38 &plic 33>, <39 &plic 34>, <40 &plic 35>,
+                       <41 &plic 36>, <42 &plic 37>, <43 &plic 38>,
+                       <44 &plic 39>, <45 &plic 40>, <46 &plic 41>,
+                       <47 &plic 42>, <48 &plic 43>, <49 &plic 44>,
+                       <50 &plic 45>, <51 &plic 46>, <52 &plic 47>,
+                       <53 &plic 48>, <54 &plic 49>, <55 &plic 50>,
+
+                       <64 &plic 53>, <65 &plic 53>, <66 &plic 53>,
+                       <67 &plic 53>, <68 &plic 53>, <69 &plic 53>,
+                       <70 &plic 53>, <71 &plic 53>, <72 &plic 53>,
+                       <73 &plic 53>, <74 &plic 53>, <75 &plic 53>,
+                       <76 &plic 53>, <77 &plic 53>, <78 &plic 53>,
+                       <79 &plic 53>, <80 &plic 53>, <81 &plic 53>,
+                       <82 &plic 53>, <83 &plic 53>, <84 &plic 53>,
+                       <85 &plic 53>, <86 &plic 53>, <87 &plic 53>,
+                       <88 &plic 53>, <89 &plic 53>, <90 &plic 53>,
+                       <91 &plic 53>, <92 &plic 53>, <93 &plic 53>,
+                       <94 &plic 53>, <95 &plic 53>;
+};
+
 &gpio1 {
-       interrupts = <27>, <28>, <29>, <30>,
-                    <31>, <32>, <33>, <47>,
-                    <35>, <36>, <37>, <38>,
-                    <39>, <40>, <41>, <42>,
-                    <43>, <44>, <45>, <46>,
-                    <47>, <48>, <49>, <50>;
        status = "okay";
 };
 
index bf004e10d60d57347a8623f4bd1fca57bb9c3814..e065e9ecf51629816017b47e3b982e62049c2e85 100644 (file)
                        #size-cells = <1>;
                        #reset-cells = <1>;
 
+                       irqmux: interrupt-controller@54 {
+                               compatible = "microchip,mpfs-irqmux";
+                               reg = <0x54 0x4>;
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-map-mask = <0x7f>;
+                       };
+
                        iomux0: pinctrl@200 {
                                compatible = "microchip,mpfs-pinctrl-iomux0";
                                reg = <0x200 0x4>;
                gpio0: gpio@20120000 {
                        compatible = "microchip,mpfs-gpio";
                        reg = <0x0 0x20120000 0x0 0x1000>;
-                       interrupt-parent = <&plic>;
+                       interrupt-parent = <&irqmux>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       interrupts = <0>, <1>, <2>, <3>,
+                                    <4>, <5>, <6>, <7>,
+                                    <8>, <9>, <10>, <11>,
+                                    <12>, <13>;
                        clocks = <&clkcfg CLK_GPIO0>;
                        gpio-controller;
                        #gpio-cells = <2>;
+                       ngpios = <14>;
                        status = "disabled";
                };
 
                gpio1: gpio@20121000 {
                        compatible = "microchip,mpfs-gpio";
                        reg = <0x0 0x20121000 0x0 0x1000>;
-                       interrupt-parent = <&plic>;
+                       interrupt-parent = <&irqmux>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       interrupts = <32>, <33>, <34>, <35>,
+                                    <36>, <37>, <38>, <39>,
+                                    <40>, <41>, <42>, <43>,
+                                    <44>, <45>, <46>, <47>,
+                                    <48>, <49>, <50>, <51>,
+                                    <52>, <53>, <54>, <55>;
                        clocks = <&clkcfg CLK_GPIO1>;
                        gpio-controller;
                        #gpio-cells = <2>;
+                       ngpios = <24>;
                        status = "disabled";
                };
 
                gpio2: gpio@20122000 {
                        compatible = "microchip,mpfs-gpio";
                        reg = <0x0 0x20122000 0x0 0x1000>;
-                       interrupt-parent = <&plic>;
+                       interrupt-parent = <&irqmux>;
                        interrupt-controller;
                        #interrupt-cells = <1>;
+                       interrupts = <64>, <65>, <66>, <67>,
+                                    <68>, <69>, <70>, <71>,
+                                    <72>, <73>, <74>, <75>,
+                                    <76>, <77>, <78>, <79>,
+                                    <80>, <81>, <82>, <83>,
+                                    <84>, <85>, <86>, <87>,
+                                    <88>, <89>, <90>, <91>,
+                                    <92>, <93>, <94>, <95>;
                        clocks = <&clkcfg CLK_GPIO2>;
                        gpio-controller;
                        #gpio-cells = <2>;
+                       ngpios = <32>;
                        status = "disabled";
                };