RISCV_CORE("andes-ax45", "rv64imafdc_zicsr_zifencei_xandesperf", "andes-45-series")
RISCV_CORE("spacemit-x60", "rv64imafdcv_zba_zbb_zbc_zbs_zicboz_zicond_"
- "zbkc_zfh_zvfh_zvkt_zvl256b_sscofpmf",
+ "zbkc_zfh_zvfh_zvkt_zvl256b_sscofpmf_xsmtvdot",
"spacemit-x60")
#undef RISCV_CORE
--- /dev/null
+/* SpacemiT extension definition file for RISC-V.
+ Copyright (C) 2025 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>.
+
+Please run `make riscv-regen` in build folder to make sure updated anything.
+
+Format of DEFINE_RISCV_EXT, please refer to riscv-ext.def. */
+
+DEFINE_RISCV_EXT(
+ /* NAME */ xsmtvdot,
+ /* UPPERCASE_NAME */ XSMTVDOT,
+ /* FULL_NAME */ "SpacemiT vector dot product extension",
+ /* DESC */ "",
+ /* URL */ ,
+ /* DEP_EXTS */ ({"zve32x"}),
+ /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+ /* FLAG_GROUP */ xsmt,
+ /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+ /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+ /* EXTRA_EXTENSION_FLAGS */ 0)
+
$(srcdir)/config/riscv/riscv-ext-thead.def \
$(srcdir)/config/riscv/riscv-ext-ventana.def \
$(srcdir)/config/riscv/riscv-ext-mips.def \
- $(srcdir)/config/riscv/riscv-ext-andes.def
+ $(srcdir)/config/riscv/riscv-ext-andes.def \
+ $(srcdir)/config/riscv/riscv-ext-spacemit.def
$(srcdir)/config/riscv/riscv-ext.opt: $(RISCV_EXT_DEFS)