re PR target/61231 (bootstrap comparision failure on powerpc64le-linux-gnu)

	PR target/61231
	* config/rs6000/rs6000.c (mem_operand_gpr): Handle SImode.
	* config/rs6000/rs6000.md (extendsidi2_lfiwax, extendsidi2_nocell):
	Use "Y" constraint rather than "m".

From-SVN: r210837

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 667a495b12f28026cd36529d313d6e2905f10afd..746b40f1f2bc79329423994dbecf8a8b92c6fce3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2014-05-23  Alan Modra  <amodra@gmail.com>
+
+       PR target/61231
+       * config/rs6000/rs6000.c (mem_operand_gpr): Handle SImode.
+       * config/rs6000/rs6000.md (extendsidi2_lfiwax, extendsidi2_nocell):
+       Use "Y" constraint rather than "m".
+
 2014-05-22  Peter Bergner  <bergner@vnet.ibm.com>
 
        Backport from mainline

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 08308fdf1e1fead602e365d9d5ffcc079972d3c9..29f1a32dd8a28bcbff347fb5a7fa243563417712 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6109,7 +6109,8 @@ mem_operand_gpr (rtx op, enum machine_mode mode)
     return false;
 
   extra = GET_MODE_SIZE (mode) - UNITS_PER_WORD;
-  gcc_assert (extra >= 0);
+  if (extra < 0)
+    extra = 0;
 
   if (GET_CODE (addr) == LO_SUM)
     /* For lo_sum addresses, we must allow any offset except one that

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index b1354ff606a3e1b9b463aa294f090ea6c98c90c7..78b8c828b8efdad04a1d99fa06bba3e676c5accd 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -737,7 +737,7 @@
 
 (define_insn "*extendsidi2_lfiwax"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,??wm,!wl,!wu")
-       (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r,r,Z,Z")))]
+       (sign_extend:DI (match_operand:SI 1 "lwa_operand" "Y,r,r,Z,Z")))]
   "TARGET_POWERPC64 && TARGET_LFIWAX"
   "@
    lwa%U1%X1 %0,%1
@@ -760,7 +760,7 @@
 
 (define_insn "*extendsidi2_nocell"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
-       (sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))]
+       (sign_extend:DI (match_operand:SI 1 "lwa_operand" "Y,r")))]
   "TARGET_POWERPC64 && rs6000_gen_cell_microcode && !TARGET_LFIWAX"
   "@
    lwa%U1%X1 %0,%1