]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net: stmmac: s32: use a syscon for S32_PHY_INTF_SEL_RGMII
authorDan Carpenter <dan.carpenter@linaro.org>
Fri, 30 Jan 2026 13:19:41 +0000 (16:19 +0300)
committerJakub Kicinski <kuba@kernel.org>
Thu, 5 Feb 2026 02:17:28 +0000 (18:17 -0800)
On the s32 chipsets the GMAC_0_CTRL_STS register is in GPR region.
Originally, accessing this register was done in a sort of ad-hoc way,
but we want to use the syscon interface to do it.

This is a little bit ugly because we have to maintain backwards
compatibility to the old device trees so we have to support both ways
to access this register.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
Link: https://patch.msgid.link/b6b60d03344d070b2b4db7f0f00527f166e594e0.1769764941.git.dan.carpenter@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c

index 5a485ee98fa721e3b77d9fed19ab741e4b226924..af594a09667651f7306a226ada5e175e6b09c1ff 100644 (file)
 #include <linux/device.h>
 #include <linux/ethtool.h>
 #include <linux/io.h>
+#include <linux/mfd/syscon.h>
 #include <linux/module.h>
 #include <linux/of_mdio.h>
 #include <linux/of_address.h>
 #include <linux/phy.h>
 #include <linux/phylink.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 #include <linux/stmmac.h>
 
 #include "stmmac_platform.h"
@@ -32,6 +34,8 @@
 struct s32_priv_data {
        void __iomem *ioaddr;
        void __iomem *ctrl_sts;
+       struct regmap *sts_regmap;
+       unsigned int sts_offset;
        struct device *dev;
        phy_interface_t *intf_mode;
        struct clk *tx_clk;
@@ -40,11 +44,17 @@ struct s32_priv_data {
 
 static int s32_gmac_write_phy_intf_select(struct s32_priv_data *gmac)
 {
-       writel(S32_PHY_INTF_SEL_RGMII, gmac->ctrl_sts);
+       int ret = 0;
+
+       if (gmac->ctrl_sts)
+               writel(S32_PHY_INTF_SEL_RGMII, gmac->ctrl_sts);
+       else
+               ret = regmap_write(gmac->sts_regmap, gmac->sts_offset,
+                                  S32_PHY_INTF_SEL_RGMII);
 
        dev_dbg(gmac->dev, "PHY mode set to %s\n", phy_modes(*gmac->intf_mode));
 
-       return 0;
+       return ret;
 }
 
 static int s32_gmac_init(struct device *dev, void *priv)
@@ -125,10 +135,16 @@ static int s32_dwmac_probe(struct platform_device *pdev)
                                     "dt configuration failed\n");
 
        /* PHY interface mode control reg */
-       gmac->ctrl_sts = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
-       if (IS_ERR(gmac->ctrl_sts))
-               return dev_err_probe(dev, PTR_ERR(gmac->ctrl_sts),
-                                    "S32CC config region is missing\n");
+       gmac->sts_regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
+                                       "nxp,phy-sel", 1, &gmac->sts_offset);
+       if (gmac->sts_regmap == ERR_PTR(-EPROBE_DEFER))
+               return PTR_ERR(gmac->sts_regmap);
+       if (IS_ERR(gmac->sts_regmap)) {
+               gmac->ctrl_sts = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
+               if (IS_ERR(gmac->ctrl_sts))
+                       return dev_err_probe(dev, PTR_ERR(gmac->ctrl_sts),
+                                            "S32CC config region is missing\n");
+       }
 
        /* tx clock */
        gmac->tx_clk = devm_clk_get(&pdev->dev, "tx");