ifcvt: Lower bitfields only if suitable for scalar register [PR 109005]

This patch fixes the condition check for eligilibity of lowering bitfields,
where before we would check for non-BLKmode types, in the hope of excluding
unsuitable aggregate types, we now check directly the representative is not an
aggregate type, i.e. suitable for a scalar register.

gcc/ChangeLog:

	PR tree-optimization/109005
	* tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
	aggregate type check.

diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc
index f133102ad3350a0fd3a09ad836c68e840f316a0e..ca1abd8656c6c47c314d2b2c9fa515e150d1703b 100644 (file)
--- a/gcc/tree-if-conv.cc
+++ b/gcc/tree-if-conv.cc
@@ -3317,9 +3317,9 @@ get_bitfield_rep (gassign *stmt, bool write, tree *bitpos,
   tree field_decl = TREE_OPERAND (comp_ref, 1);
   tree rep_decl = DECL_BIT_FIELD_REPRESENTATIVE (field_decl);
 
-  /* Bail out if the representative is BLKmode as we will not be able to
-     vectorize this.  */
-  if (TYPE_MODE (TREE_TYPE (rep_decl)) == E_BLKmode)
+  /* Bail out if the representative is not a suitable type for a scalar
+     register variable.  */
+  if (!is_gimple_reg_type (TREE_TYPE (rep_decl)))
     return NULL_TREE;
 
   /* Bail out if the DECL_SIZE of the field_decl isn't the same as the BF's