Add a kludgey implementation of XTEST to go with the kludgey

implementation of XBEGIN.  Also kludge the CPUID output for AVX
capable targets so as to claim we support HTM.
Mark Wielaard, mjw@redhat.com)

git-svn-id: svn://svn.valgrind.org/vex/trunk@2776

diff --git a/VEX/priv/guest_amd64_helpers.c b/VEX/priv/guest_amd64_helpers.c
index a173ec197c24bcead1bac2bd772a65555dda7c9f..0a7e300044a23ee590d42e4adf6b07649d8182e0 100644 (file)
--- a/VEX/priv/guest_amd64_helpers.c
+++ b/VEX/priv/guest_amd64_helpers.c
@@ -2570,7 +2570,7 @@ void amd64g_dirtyhelper_CPUID_sse42_and_cx16 ( VexGuestAMD64State* st )
 
 
 /* Claim to be the following CPU (4 x ...), which is AVX and cx16
-   capable.
+   capable.  Plus (kludge!) it "supports" HTM.
 
    vendor_id       : GenuineIntel
    cpu family      : 6
@@ -2651,7 +2651,7 @@ void amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st )
          SET_ABCD(0x00000077, 0x00000002, 0x00000009, 0x00000000);
          break;
       case 0x00000007:
-         SET_ABCD(0x00000000, 0x00000000, 0x00000000, 0x00000000);
+         SET_ABCD(0x00000000, 0x00000800, 0x00000000, 0x00000000);
          break;
       case 0x00000008:
          SET_ABCD(0x00000000, 0x00000000, 0x00000000, 0x00000000);

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index 271f0fb9286e6e3ff0c916c4a6f956d0eec8759b..a29e175182976472b9f1d3fa1572724cbe4bf7a4 100644 (file)
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -20066,8 +20066,8 @@ Long dis_ESC_NONE (
          return delta;
       }
       /* BEGIN HACKY SUPPORT FOR xbegin */
-      if (0/*CURRENTLY DISABLED*/ &&
-          modrm == 0xF8 && !haveF2orF3(pfx) && sz == 4) {
+      if (modrm == 0xF8 && !have66orF2orF3(pfx) && sz == 4
+          && (archinfo->hwcaps & VEX_HWCAPS_AMD64_AVX2)) {
          delta++; /* mod/rm byte */
          d64 = getSDisp(4,delta); 
          delta += 4;
@@ -20723,6 +20723,22 @@ Long dis_ESC_0F (
          putIRegRDX(4, mkU32(0));
          return delta;
       }
+      /* BEGIN HACKY SUPPORT FOR xtest */
+      /* 0F 01 D6 = XTEST */
+      if (modrm == 0xD6 && (archinfo->hwcaps & VEX_HWCAPS_AMD64_AVX2)) {
+         /* Sets ZF because there never is a transaction, and all
+            CF, OF, SF, PF and AF are always cleared by xtest. */
+         delta += 1;
+         DIP("xtest\n");
+         stmt( IRStmt_Put( OFFB_CC_OP,   mkU64(AMD64G_CC_OP_COPY) ));
+         stmt( IRStmt_Put( OFFB_CC_DEP2, mkU64(0) ));
+         stmt( IRStmt_Put( OFFB_CC_DEP1, mkU64(AMD64G_CC_MASK_Z) ));
+         /* Set NDEP even though it isn't used.  This makes redundant-PUT
+            elimination of previous stores to this field work better. */
+         stmt( IRStmt_Put( OFFB_CC_NDEP, mkU64(0) ));
+         return delta;
+      }
+      /* END HACKY SUPPORT FOR xtest */
       /* 0F 01 F9 = RDTSCP */
       if (modrm == 0xF9 && (archinfo->hwcaps & VEX_HWCAPS_AMD64_RDTSCP)) {
          delta += 1;