Merge tag 'renesas-clk-for-v6.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel...

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Add Expanded Serial Peripheral Interface (xSPI) clocks and resets on
   Renesas RZ/V2H(P) and RZ/V2N
 - Add SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
 - Add SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
 - Add Ethernet clocks and resets on Renesas RZ/G3E
 - Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
  (R9A09G087) SoCs
 - Add Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
 - Add timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on
   Renesas RZ/V2N
 - Rework Module Stop and Power Domain support on the Renesas
   RZ/G2L family of SoCs (especially on RZ/G3S)
 - Add I3C clocks and resets on Renesas RZ/G3E

* tag 'renesas-clk-for-v6.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (42 commits)
  clk: renesas: r9a08g045: Add MSTOP for coupled clocks as well
  clk: renesas: r9a09g047: Add clock and reset signals for the GBETH IPs
  clk: renesas: r9a09g057: Add XSPI clock/reset
  clk: renesas: r9a09g056: Add XSPI clock/reset
  clk: renesas: rzv2h: Add fixed-factor module clocks with status reporting
  clk: renesas: r9a09g057: Add support for xspi mux and divider
  clk: renesas: r9a09g056: Add support for xspi mux and divider
  clk: renesas: r9a09g077: Add RIIC module clocks
  clk: renesas: r9a09g077: Add PLL2 and SDHI clock support
  clk: renesas: rzv2h: Drop redundant base pointer from pll_clk
  clk: renesas: r9a09g057: Add entries for the RSPIs
  dt-bindings: clock: renesas,r9a09g077/87: Add SDHI_CLKHS clock ID
  dt-bindings: clock: renesas,r9a09g056/57-cpg: Add XSPI core clock
  clk: renesas: rzv2h: Add missing include file
  clk: renesas: rzv2h: Use devm_kmemdup_array()
  clk: renesas: Add CPG/MSSR support to RZ/N2H SoC
  clk: renesas: r9a09g077: Add PCLKL core clock
  dt-bindings: clock: renesas,cpg-mssr: Document RZ/N2H support
  dt-bindings: soc: renesas: Document RZ/N2H (R9A09G087) SoC
  dt-bindings: clock: renesas,r9a09g077: Add PCLKL core clock ID
  ...