]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: ipq6018: Add missing MSI and 'global' IRQs
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thu, 27 Feb 2025 13:41:01 +0000 (19:11 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:36:04 +0000 (12:36 -0500)
IPQ6018 has 8 MSI SPI interrupts and one 'global' interrupt.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250227-pcie-global-irq-v1-19-2b70a7819d1e@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/ipq6018.dtsi

index 7f0faf26b7079596e0f8451cc3d05a76d231c2b9..bfe59b0208415902c69fd0c0c7565d97997d4207 100644 (file)
                        ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>,
                                 <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>;
 
-                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "msi";
+                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "msi0",
+                                         "msi1",
+                                         "msi2",
+                                         "msi3",
+                                         "msi4",
+                                         "msi5",
+                                         "msi6",
+                                         "msi7",
+                                         "global";
 
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;