]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
media: amphion: Reduce decoding latency for HEVC decoder
authorMing Qian <ming.qian@oss.nxp.com>
Tue, 1 Apr 2025 09:06:56 +0000 (17:06 +0800)
committerHans Verkuil <hverkuil@xs4all.nl>
Tue, 8 Apr 2025 07:21:21 +0000 (07:21 +0000)
The amphion decoder firmware supports a low latency flush mode for the
HEVC format since v1.9.0. This feature, which is enabled when the
display delay is set to 0, can help to reduce the decoding latency by
appending some padding data to every frame.

Signed-off-by: Ming Qian <ming.qian@oss.nxp.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
drivers/media/platform/amphion/vpu_malone.c

index 4769c053c6c29f62d6350b717db86653b12a90c6..e07de425ab16f4e113fb8a56e58f70c617f661df 100644 (file)
@@ -3,6 +3,7 @@
  * Copyright 2020-2021 NXP
  */
 
+#include <linux/bitfield.h>
 #include <linux/init.h>
 #include <linux/interconnect.h>
 #include <linux/ioctl.h>
 
 #define MALONE_DEC_FMT_RV_MASK                 BIT(21)
 
+#define MALONE_VERSION_MASK                    0xFFFFF
+#define MALONE_VERSION(maj, min, inc)          \
+               (FIELD_PREP(0xF0000, maj) | FIELD_PREP(0xFF00, min) | FIELD_PREP(0xFF, inc))
+#define CHECK_VERSION(iface, maj, min)         \
+               (FIELD_GET(MALONE_VERSION_MASK, (iface)->fw_version) >= MALONE_VERSION(maj, min, 0))
+
 enum vpu_malone_stream_input_mode {
        INVALID_MODE = 0,
        FRAME_LVL,
@@ -332,6 +339,8 @@ struct vpu_dec_ctrl {
        u32 buf_addr[VID_API_NUM_STREAMS];
 };
 
+static const struct malone_padding_scode *get_padding_scode(u32 type, u32 fmt);
+
 u32 vpu_malone_get_data_size(void)
 {
        return sizeof(struct vpu_dec_ctrl);
@@ -654,9 +663,15 @@ static int vpu_malone_set_params(struct vpu_shared_addr *shared,
                hc->jpg[instance].jpg_mjpeg_interlaced = 0;
        }
 
-       hc->codec_param[instance].disp_imm = params->display_delay_enable ? 1 : 0;
-       if (malone_format != MALONE_FMT_AVC)
+       if (params->display_delay_enable &&
+           get_padding_scode(SCODE_PADDING_BUFFLUSH, params->codec_format))
+               hc->codec_param[instance].disp_imm = 1;
+       else
                hc->codec_param[instance].disp_imm = 0;
+
+       if (params->codec_format == V4L2_PIX_FMT_HEVC && !CHECK_VERSION(iface, 1, 9))
+               hc->codec_param[instance].disp_imm = 0;
+
        hc->codec_param[instance].dbglog_enable = 0;
        iface->dbglog_desc.level = 0;
 
@@ -1023,6 +1038,7 @@ static const struct malone_padding_scode padding_scodes[] = {
        {SCODE_PADDING_EOS,      V4L2_PIX_FMT_JPEG,        {0x0, 0x0}},
        {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264,        {0x15010000, 0x0}},
        {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_H264_MVC,    {0x15010000, 0x0}},
+       {SCODE_PADDING_BUFFLUSH, V4L2_PIX_FMT_HEVC,        {0x3e010000, 0x20}},
 };
 
 static const struct malone_padding_scode padding_scode_dft = {0x0, 0x0};
@@ -1057,8 +1073,11 @@ static int vpu_malone_add_padding_scode(struct vpu_buffer *stream_buffer,
        int ret;
 
        ps = get_padding_scode(scode_type, pixelformat);
-       if (!ps)
+       if (!ps) {
+               if (scode_type == SCODE_PADDING_BUFFLUSH)
+                       return 0;
                return -EINVAL;
+       }
 
        wptr = readl(&str_buf->wptr);
        if (wptr < stream_buffer->phys || wptr > stream_buffer->phys + stream_buffer->length)