clk: renesas: r8a779a0: Add FCPVX clocks

Add the FCPVX modules clock for Renesas R-Car V3U.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250109125036.2399199-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 9c7e4094705c72bfe44bf96680f967f68de784cd..4a5b4e2afa92aba8b3d7b567652425bd2b8a3d21 100644 (file)
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -238,6 +238,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
        DEF_MOD("vspx1",        1029,   R8A779A0_CLK_S1D1),
        DEF_MOD("vspx2",        1030,   R8A779A0_CLK_S1D1),
        DEF_MOD("vspx3",        1031,   R8A779A0_CLK_S1D1),
+       DEF_MOD("fcpvx0",       1100,   R8A779A0_CLK_S1D1),
+       DEF_MOD("fcpvx1",       1101,   R8A779A0_CLK_S1D1),
+       DEF_MOD("fcpvx2",       1102,   R8A779A0_CLK_S1D1),
+       DEF_MOD("fcpvx3",       1103,   R8A779A0_CLK_S1D1),
 };
 
 static const unsigned int r8a779a0_crit_mod_clks[] __initconst = {