drm: fsl-dcu: enable PIXCLK on LS1021A

[ Upstream commit ffcde9e44d3e18fde3d18bfff8d9318935413bfd ]

The PIXCLK needs to be enabled in SCFG before accessing certain DCU
registers, or the access will hang. For simplicity, the PIXCLK is enabled
unconditionally, resulting in increased power consumption.

Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Fixes: 109eee2f2a18 ("drm/layerscape: Add Freescale DCU DRM driver")
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240926055552.1632448-2-alexander.stein@ew.tq-group.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/fsl-dcu/Kconfig b/drivers/gpu/drm/fsl-dcu/Kconfig
index 5ca71ef87325906ded46d6c25e19e146cb3bf945..c9ee98693b48a4fa89a50752387424ae299ed09e 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/Kconfig
+++ b/drivers/gpu/drm/fsl-dcu/Kconfig
@@ -8,6 +8,7 @@ config DRM_FSL_DCU
        select DRM_PANEL
        select REGMAP_MMIO
        select VIDEOMODE_HELPERS
+       select MFD_SYSCON if SOC_LS1021A
        help
          Choose this option if you have an Freescale DCU chipset.
          If M is selected the module will be called fsl-dcu-drm.

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
index ab6c0c6cd0e2e39bb2f8b10a5ce9d8de527c6ee5..c4c3d41ee5309771e4348cbc9ddcb05d34602bb8 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c
@@ -100,6 +100,7 @@ static void fsl_dcu_irq_uninstall(struct drm_device *dev)
 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
 {
        struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
+       struct regmap *scfg;
        int ret;
 
        ret = fsl_dcu_drm_modeset_init(fsl_dev);
@@ -108,6 +109,20 @@ static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
                return ret;
        }
 
+       scfg = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg");
+       if (PTR_ERR(scfg) != -ENODEV) {
+               /*
+                * For simplicity, enable the PIXCLK unconditionally,
+                * resulting in increased power consumption. Disabling
+                * the clock in PM or on unload could be implemented as
+                * a future improvement.
+                */
+               ret = regmap_update_bits(scfg, SCFG_PIXCLKCR, SCFG_PIXCLKCR_PXCEN,
+                                        SCFG_PIXCLKCR_PXCEN);
+               if (ret < 0)
+                       return dev_err_probe(dev->dev, ret, "failed to enable pixclk\n");
+       }
+
        ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
        if (ret < 0) {
                dev_err(dev->dev, "failed to initialize vblank\n");

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
index e2049a0e8a92a57db9fafe9fb1b164229014664d..566396013c04a51d7d834666256bcca9f52d0b32 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h
@@ -160,6 +160,9 @@
 #define FSL_DCU_ARGB4444               12
 #define FSL_DCU_YUV422                 14
 
+#define SCFG_PIXCLKCR                  0x28
+#define SCFG_PIXCLKCR_PXCEN            BIT(31)
+
 #define VF610_LAYER_REG_NUM            9
 #define LS1021A_LAYER_REG_NUM          10