]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
backport: tilegx-builtins.h (enum tilegx_builtin): Add TILEGX_INSN_SHUFFLEBYTES1.
authorWalter Lee <walt@tilera.com>
Tue, 26 Mar 2013 06:34:27 +0000 (06:34 +0000)
committerWalter Lee <walt@gcc.gnu.org>
Tue, 26 Mar 2013 06:34:27 +0000 (06:34 +0000)
Backport from mainline:
2013-03-25  Walter Lee  <walt@tilera.com>

* config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
TILEGX_INSN_SHUFFLEBYTES1.
* config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
shufflebytes1.
(tilegx_builtins): Ditto.
* config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.

From-SVN: r197092

gcc/ChangeLog
gcc/config/tilegx/tilegx-builtins.h
gcc/config/tilegx/tilegx.c
gcc/config/tilegx/tilegx.md

index 6108b098fd08353512cc319a2dd213667c190318..bf5e577368675f534d878a62ba722e8be80bc89f 100644 (file)
@@ -1,3 +1,15 @@
+2013-03-26  Walter Lee  <walt@tilera.com>
+
+       Backport from mainline:
+       2013-03-25  Walter Lee  <walt@tilera.com>
+
+       * config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
+       TILEGX_INSN_SHUFFLEBYTES1.
+       * config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
+       shufflebytes1.
+       (tilegx_builtins): Ditto.
+       * config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.
+
 2013-03-26  Walter Lee  <walt@tilera.com>
 
        Backport from mainline:
index 49067ae0b26133f9a82f5898c02dd2757d28f11d..1206d5ee90128f8088f7031d68f942e716fb6794 100644 (file)
@@ -194,6 +194,7 @@ enum tilegx_builtin
   TILEGX_INSN_SHRU,
   TILEGX_INSN_SHRUX,
   TILEGX_INSN_SHUFFLEBYTES,
+  TILEGX_INSN_SHUFFLEBYTES1,
   TILEGX_INSN_ST,
   TILEGX_INSN_ST1,
   TILEGX_INSN_ST2,
index ff36b2e35165b6434f7097f4bcd1eaf19bfc533e..3add23c0fa60f2e009681feca4381800c4a1abaf 100644 (file)
@@ -2844,6 +2844,7 @@ static struct tile_builtin_info tilegx_builtin_info[TILEGX_BUILTIN_max] = {
   { CODE_FOR_lshrdi3,                   NULL }, /* shru */
   { CODE_FOR_lshrsi3,                   NULL }, /* shrux */
   { CODE_FOR_insn_shufflebytes,         NULL }, /* shufflebytes */
+  { CODE_FOR_insn_shufflebytes1,        NULL }, /* shufflebytes1 */
   { CODE_FOR_insn_st,                   NULL }, /* st */
   { CODE_FOR_insn_st1,                  NULL }, /* st1 */
   { CODE_FOR_insn_st2,                  NULL }, /* st2 */
@@ -3172,6 +3173,7 @@ static const struct tilegx_builtin_def tilegx_builtins[] = {
   { "__insn_shrux",              TILEGX_INSN_SHRUX,              true,  "iii"  },
   { "__insn_shruxi",             TILEGX_INSN_SHRUX,              true,  "iii"  },
   { "__insn_shufflebytes",       TILEGX_INSN_SHUFFLEBYTES,       true,  "llll" },
+  { "__insn_shufflebytes1",      TILEGX_INSN_SHUFFLEBYTES1,      true,  "lll"  },
   { "__insn_st",                 TILEGX_INSN_ST,                 false, "vpl"  },
   { "__insn_st1",                TILEGX_INSN_ST1,                false, "vpl"  },
   { "__insn_st2",                TILEGX_INSN_ST2,                false, "vpl"  },
index 048fe3a90c59731be3aa2b713b2d2b44699c156c..73479e3c236372876723c6c13a2360a3d18ac025 100644 (file)
   "shufflebytes\t%0, %r2, %r3"
   [(set_attr "type" "X0")])
 
+(define_insn "insn_shufflebytes1"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+        (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "rO")
+                    (match_operand:DI 2 "reg_or_0_operand" "rO")]
+                   UNSPEC_INSN_SHUFFLEBYTES))]
+  ""
+  "shufflebytes\t%0, %r1, %r2"
+  [(set_attr "type" "X0")])
+
 ;; stores
 
 (define_expand "insn_st"