Bug 332658 - ldrd.w r1, r2, [PC, #imm] does not adjust for 32bit alignment

(dimitry@google.com)

git-svn-id: svn://svn.valgrind.org/vex/trunk@2843

diff --git a/VEX/priv/guest_arm_toIR.c b/VEX/priv/guest_arm_toIR.c
index 39d8ef8400cd26e4539adb65b8e1472eff7a3d92..e3fc4b9924be1a22e5dff1f0efbe104b9e2f54cf 100644 (file)
--- a/VEX/priv/guest_arm_toIR.c
+++ b/VEX/priv/guest_arm_toIR.c
@@ -20455,7 +20455,9 @@ DisResult disInstr_THUMB_WRK (
 
       if (valid) {
          IRTemp preAddr = newTemp(Ity_I32);
-         assign(preAddr, getIRegT(rN));
+         assign(preAddr, 15 == rN
+                           ? binop(Iop_And32, getIRegT(15), mkU32(~3U))
+                           : getIRegT(rN));
 
          IRTemp postAddr = newTemp(Ity_I32);
          assign(postAddr, binop(bU == 1 ? Iop_Add32 : Iop_Sub32,