#define AXI_DMA_FLAG_HAS_APB_REGS BIT(0)
#define AXI_DMA_FLAG_HAS_RESETS BIT(1)
#define AXI_DMA_FLAG_USE_CFG2 BIT(2)
+#define AXI_DMA_FLAG_ARG0_AS_CHAN BIT(3)
static inline void
axi_dma_iowrite32(struct axi_dma_chip *chip, u32 reg, u32 val)
static struct dma_chan *dw_axi_dma_of_xlate(struct of_phandle_args *dma_spec,
struct of_dma *ofdma)
{
+ unsigned int handshake = dma_spec->args[0];
struct dw_axi_dma *dw = ofdma->of_dma_data;
- struct axi_dma_chan *chan;
+ struct axi_dma_chan *chan = NULL;
struct dma_chan *dchan;
- dchan = dma_get_any_slave_channel(&dw->dma);
+ if (dw->hdata->use_handshake_as_channel_number) {
+ if (handshake >= dw->hdata->nr_channels)
+ return NULL;
+
+ chan = &dw->chan[handshake];
+ dchan = dma_get_slave_channel(&chan->vc.chan);
+ } else {
+ dchan = dma_get_any_slave_channel(&dw->dma);
+ }
+
if (!dchan)
return NULL;
- chan = dchan_to_axi_dma_chan(dchan);
- chan->hw_handshake_num = dma_spec->args[0];
+ if (!chan)
+ chan = dchan_to_axi_dma_chan(dchan);
+ chan->hw_handshake_num = handshake;
return dchan;
}
return ret;
}
+ chip->dw->hdata->use_handshake_as_channel_number = !!(flags & AXI_DMA_FLAG_ARG0_AS_CHAN);
+
chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2);
chip->core_clk = devm_clk_get(chip->dev, "core-clk");
}, {
.compatible = "intel,kmb-axi-dma",
.data = (void *)AXI_DMA_FLAG_HAS_APB_REGS,
+ }, {
+ .compatible = "sophgo,cv1800b-axi-dma",
+ .data = (void *)AXI_DMA_FLAG_ARG0_AS_CHAN,
}, {
.compatible = "starfive,jh7110-axi-dma",
.data = (void *)(AXI_DMA_FLAG_HAS_RESETS | AXI_DMA_FLAG_USE_CFG2),