perf arm_spe: Decode GCS operation

Decode a load or store from a GCS operation and the associated "common"
field.

After:

  .  00000000:  49 44                                           LD GCS COMM
  .  00000002:  b2 18 3c d7 83 00 80 ff ff                      VA 0xffff800083d73c18
  .  0000000b:  9a 00 00                                        LAT 0 XLAT
  .  0000000e:  43 00                                           DATA-SOURCE 0

Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index f6e9c58ce62f3ae227a79d91caefaef4bd87d98a..0046079edaccdd4d0c093f73395d1ecdc0007621 100644 (file)
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -394,6 +394,10 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
                                arm_spe_pkt_out_string(&err, &buf, &buf_len, " PRED");
                        if (payload & SPE_OP_PKT_SVE_SG)
                                arm_spe_pkt_out_string(&err, &buf, &buf_len, " SG");
+               } else if (SPE_OP_PKT_LDST_SUBCLASS_GCS(payload)) {
+                       arm_spe_pkt_out_string(&err, &buf, &buf_len, " GCS");
+                       if (payload & SPE_OP_PKT_GCS_COMM)
+                               arm_spe_pkt_out_string(&err, &buf, &buf_len, " COMM");
                }
                break;
        case SPE_OP_PKT_HDR_CLASS_BR_ERET:

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index cb947e625918922dc1fa25cf8843b09661197782..94333e7bc382deef119414e4f1de7c2878620035 100644 (file)
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -154,6 +154,10 @@ enum arm_spe_events {
 #define SPE_OP_PKT_SVE_PRED                    BIT(2)
 #define SPE_OP_PKT_SVE_FP                      BIT(1)
 
+#define SPE_OP_PKT_LDST_SUBCLASS_GCS(v)                (((v) & (GENMASK_ULL(7, 3) | BIT(1))) == 0x40)
+
+#define SPE_OP_PKT_GCS_COMM                    BIT(2)
+
 #define SPE_OP_PKT_CR_MASK                     GENMASK_ULL(4, 3)
 #define SPE_OP_PKT_CR_BL(v)                    (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 1)
 #define SPE_OP_PKT_CR_RET(v)                   (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 2)