]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/i915/dsb: Plumb dsb into plane scaler functions
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 18 Feb 2025 20:58:48 +0000 (22:58 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 27 Feb 2025 20:44:49 +0000 (22:44 +0200)
We want to start doing scaler programming (plane scalers
only initially) on the DSB. To that end plumb the DSB into
the relevant places in the scaler code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218205850.1422-3-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/skl_scaler.c
drivers/gpu/drm/i915/display/skl_scaler.h
drivers/gpu/drm/i915/display/skl_universal_plane.c

index 4843ad19899e0fcb4e73a630934bfdb3a73cf872..2a5acf45ff419dc98fc15b6eb8eedc2ec13fbad1 100644 (file)
@@ -6648,7 +6648,7 @@ static void commit_pipe_post_planes(struct intel_atomic_state *state,
         */
        if (DISPLAY_VER(dev_priv) >= 9 &&
            !intel_crtc_needs_modeset(new_crtc_state))
-               skl_detach_scalers(new_crtc_state);
+               skl_detach_scalers(NULL, new_crtc_state);
 
        if (intel_crtc_vrr_enabling(state, crtc))
                intel_vrr_enable(new_crtc_state);
index 3d24fa773094d7713118ecb323bb43f315957a14..ee81220a7c88c4a018f6dd70f879425f34bbfc63 100644 (file)
@@ -666,12 +666,14 @@ static u16 glk_nearest_filter_coef(int t)
  */
 
 static void glk_program_nearest_filter_coefs(struct intel_display *display,
+                                            struct intel_dsb *dsb,
                                             enum pipe pipe, int id, int set)
 {
        int i;
 
-       intel_de_write_fw(display, GLK_PS_COEF_INDEX_SET(pipe, id, set),
-                         PS_COEF_INDEX_AUTO_INC);
+       intel_de_write_dsb(display, dsb,
+                          GLK_PS_COEF_INDEX_SET(pipe, id, set),
+                          PS_COEF_INDEX_AUTO_INC);
 
        for (i = 0; i < 17 * 7; i += 2) {
                u32 tmp;
@@ -683,11 +685,12 @@ static void glk_program_nearest_filter_coefs(struct intel_display *display,
                t = glk_coef_tap(i + 1);
                tmp |= glk_nearest_filter_coef(t) << 16;
 
-               intel_de_write_fw(display, GLK_PS_COEF_DATA_SET(pipe, id, set),
-                                 tmp);
+               intel_de_write_dsb(display, dsb,
+                                  GLK_PS_COEF_DATA_SET(pipe, id, set), tmp);
        }
 
-       intel_de_write_fw(display, GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);
+       intel_de_write_dsb(display, dsb,
+                          GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);
 }
 
 static u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter, int set)
@@ -703,14 +706,15 @@ static u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter, int set)
        return PS_FILTER_MEDIUM;
 }
 
-static void skl_scaler_setup_filter(struct intel_display *display, enum pipe pipe,
+static void skl_scaler_setup_filter(struct intel_display *display,
+                                   struct intel_dsb *dsb, enum pipe pipe,
                                    int id, int set, enum drm_scaling_filter filter)
 {
        switch (filter) {
        case DRM_SCALING_FILTER_DEFAULT:
                break;
        case DRM_SCALING_FILTER_NEAREST_NEIGHBOR:
-               glk_program_nearest_filter_coefs(display, pipe, id, set);
+               glk_program_nearest_filter_coefs(display, dsb, pipe, id, set);
                break;
        default:
                MISSING_CASE(filter);
@@ -759,7 +763,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 
        trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
 
-       skl_scaler_setup_filter(display, pipe, id, 0,
+       skl_scaler_setup_filter(display, NULL, pipe, id, 0,
                                crtc_state->hw.scaling_filter);
 
        intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
@@ -775,7 +779,8 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 }
 
 void
-skl_program_plane_scaler(struct intel_plane *plane,
+skl_program_plane_scaler(struct intel_dsb *dsb,
+                        struct intel_plane *plane,
                         const struct intel_crtc_state *crtc_state,
                         const struct intel_plane_state *plane_state)
 {
@@ -825,35 +830,38 @@ skl_program_plane_scaler(struct intel_plane *plane,
        trace_intel_plane_scaler_update_arm(plane, scaler_id,
                                            crtc_x, crtc_y, crtc_w, crtc_h);
 
-       skl_scaler_setup_filter(display, pipe, scaler_id, 0,
+       skl_scaler_setup_filter(display, dsb, pipe, scaler_id, 0,
                                plane_state->hw.scaling_filter);
 
-       intel_de_write_fw(display, SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
-       intel_de_write_fw(display, SKL_PS_VPHASE(pipe, scaler_id),
-                         PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));
-       intel_de_write_fw(display, SKL_PS_HPHASE(pipe, scaler_id),
-                         PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));
-       intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, scaler_id),
-                         PS_WIN_XPOS(crtc_x) | PS_WIN_YPOS(crtc_y));
-       intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, scaler_id),
-                         PS_WIN_XSIZE(crtc_w) | PS_WIN_YSIZE(crtc_h));
+       intel_de_write_dsb(display, dsb, SKL_PS_CTRL(pipe, scaler_id),
+                          ps_ctrl);
+       intel_de_write_dsb(display, dsb, SKL_PS_VPHASE(pipe, scaler_id),
+                          PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));
+       intel_de_write_dsb(display, dsb, SKL_PS_HPHASE(pipe, scaler_id),
+                          PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));
+       intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(pipe, scaler_id),
+                          PS_WIN_XPOS(crtc_x) | PS_WIN_YPOS(crtc_y));
+       intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(pipe, scaler_id),
+                          PS_WIN_XSIZE(crtc_w) | PS_WIN_YSIZE(crtc_h));
 }
 
-static void skl_detach_scaler(struct intel_crtc *crtc, int id)
+static void skl_detach_scaler(struct intel_dsb *dsb,
+                             struct intel_crtc *crtc, int id)
 {
        struct intel_display *display = to_intel_display(crtc);
 
        trace_intel_scaler_disable_arm(crtc, id);
 
-       intel_de_write_fw(display, SKL_PS_CTRL(crtc->pipe, id), 0);
-       intel_de_write_fw(display, SKL_PS_WIN_POS(crtc->pipe, id), 0);
-       intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, id), 0);
+       intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);
+       intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);
+       intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);
 }
 
 /*
  * This function detaches (aka. unbinds) unused scalers in hardware
  */
-void skl_detach_scalers(const struct intel_crtc_state *crtc_state)
+void skl_detach_scalers(struct intel_dsb *dsb,
+                       const struct intel_crtc_state *crtc_state)
 {
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        const struct intel_crtc_scaler_state *scaler_state =
@@ -863,7 +871,7 @@ void skl_detach_scalers(const struct intel_crtc_state *crtc_state)
        /* loop through and disable scalers that aren't in use */
        for (i = 0; i < crtc->num_scalers; i++) {
                if (!scaler_state->scalers[i].in_use)
-                       skl_detach_scaler(crtc, i);
+                       skl_detach_scaler(dsb, crtc, i);
        }
 }
 
@@ -873,7 +881,7 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
        int i;
 
        for (i = 0; i < crtc->num_scalers; i++)
-               skl_detach_scaler(crtc, i);
+               skl_detach_scaler(NULL, crtc, i);
 }
 
 void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
index 4d2e2dbb1666a1b914387a33e933d60b185cf288..355ea15260cac25089203d2bb8c97ac03565f15c 100644 (file)
@@ -8,6 +8,7 @@
 struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_dsb;
 struct intel_plane;
 struct intel_plane_state;
 
@@ -21,10 +22,12 @@ int intel_atomic_setup_scalers(struct intel_atomic_state *state,
 
 void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
 
-void skl_program_plane_scaler(struct intel_plane *plane,
+void skl_program_plane_scaler(struct intel_dsb *dsb,
+                             struct intel_plane *plane,
                              const struct intel_crtc_state *crtc_state,
                              const struct intel_plane_state *plane_state);
-void skl_detach_scalers(const struct intel_crtc_state *crtc_state);
+void skl_detach_scalers(struct intel_dsb *dsb,
+                       const struct intel_crtc_state *crtc_state);
 void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
 
 void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
index cd9762947f1de227a3abbcd61b7c7b0c9848e439..3488c7ae6d8ac167203421dc3ed00f52e3919fb6 100644 (file)
@@ -1466,7 +1466,7 @@ skl_plane_update_arm(struct intel_dsb *dsb,
         * TODO: split into noarm+arm pair
         */
        if (plane_state->scaler_id >= 0)
-               skl_program_plane_scaler(plane, crtc_state, plane_state);
+               skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);
 
        /*
         * The control register self-arms if the plane was previously
@@ -1646,7 +1646,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
         * TODO: split into noarm+arm pair
         */
        if (plane_state->scaler_id >= 0)
-               skl_program_plane_scaler(plane, crtc_state, plane_state);
+               skl_program_plane_scaler(dsb, plane, crtc_state, plane_state);
 
        icl_plane_update_sel_fetch_arm(dsb, plane, crtc_state, plane_state);