ASPEED_AST1700_DEV_SPI0,
ASPEED_AST1700_DEV_SRAM,
ASPEED_AST1700_DEV_ADC,
+ ASPEED_AST1700_DEV_SCU,
ASPEED_AST1700_DEV_UART12,
ASPEED_AST1700_DEV_LTPI_CTRL,
ASPEED_AST1700_DEV_SPI0_MEM,
[ASPEED_AST1700_DEV_SPI0] = 0x00030000,
[ASPEED_AST1700_DEV_SRAM] = 0x00BC0000,
[ASPEED_AST1700_DEV_ADC] = 0x00C00000,
+ [ASPEED_AST1700_DEV_SCU] = 0x00C02000,
[ASPEED_AST1700_DEV_UART12] = 0x00C33B00,
[ASPEED_AST1700_DEV_LTPI_CTRL] = 0x00C34000,
[ASPEED_AST1700_DEV_SPI0_MEM] = 0x04000000,
aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_ADC],
sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->adc), 0));
+ /* SCU */
+ qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev",
+ s->silicon_rev);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
+ return;
+ }
+ memory_region_add_subregion(&s->iomem,
+ aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_SCU],
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->scu), 0));
+
/* LTPI controller */
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) {
return;
object_initialize_child(obj, "ioexp-adc", &s->adc,
"aspeed.adc-ast2700");
+ /* SCU */
+ object_initialize_child(obj, "ioexp-scu", &s->scu,
+ TYPE_ASPEED_2700_SCU);
+
/* LTPI controller */
object_initialize_child(obj, "ltpi-ctrl",
&s->ltpi, TYPE_ASPEED_LTPI);
static const Property aspeed_ast1700_props[] = {
DEFINE_PROP_UINT8("board-idx", AspeedAST1700SoCState, board_idx, 0),
+ DEFINE_PROP_UINT32("silicon-rev", AspeedAST1700SoCState, silicon_rev, 0),
DEFINE_PROP_LINK("dram", AspeedAST1700SoCState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
};