Now that 3.13 will be EOL soon, switch to 3.14.
Known issues:
* 74x164 is not available because upstream dropped non-DT support
* jffs2 breaks with SMP
Unknown issues:
* probably plenty
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 40380
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GPIOLIB=y
-CONFIG_GPIO_74X164=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIPS=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_L1_CACHE_SHIFT_4=y
# CONFIG_MIPS_MACHINE is not set
CONFIG_MIPS_MT_DISABLED=y
+CONFIG_MIPS_O32_FP64_SUPPORT=y
+# CONFIG_MLX5_CORE is not set
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
+++ /dev/null
-From 8e051b79ae3f66dbad96312fe2976401c28d2148 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 12 Nov 2011 12:19:55 +0100
-Subject: [PATCH 5/5] spi: add bcm63xx HSSPI driver
-
-Add a driver for the High Speed SPI controller found on newer BCM63XX SoCs.
-
-It does feature some new modes like 3-wire or dual spi, but neither of it
-is currently implemented.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/spi/Kconfig | 7 +
- drivers/spi/Makefile | 1 +
- drivers/spi/spi-bcm63xx-hsspi.c | 484 ++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 492 insertions(+)
- create mode 100644 drivers/spi/spi-bcm63xx-hsspi.c
-
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -118,6 +118,13 @@ config SPI_BCM63XX
- help
- Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
-
-+config SPI_BCM63XX_HSSPI
-+ tristate "Broadcom BCM63XX HS SPI controller driver"
-+ depends on BCM63XX || COMPILE_TEST
-+ help
-+ This enables support for the High Speed SPI controller present on
-+ newer Broadcom BCM63XX SoCs.
-+
- config SPI_BITBANG
- tristate "Utilities for Bitbanging SPI masters"
- help
---- a/drivers/spi/Makefile
-+++ b/drivers/spi/Makefile
-@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
- obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
- obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o
- obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o
-+obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o
- obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o
- obj-$(CONFIG_SPI_BFIN_V3) += spi-bfin-v3.o
- obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o
---- /dev/null
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -0,0 +1,484 @@
-+/*
-+ * Broadcom BCM63XX High Speed SPI Controller driver
-+ *
-+ * Copyright 2000-2010 Broadcom Corporation
-+ * Copyright 2012-2013 Jonas Gorski <jogo@openwrt.org>
-+ *
-+ * Licensed under the GNU/GPL. See COPYING for details.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
-+#include <linux/interrupt.h>
-+#include <linux/spi/spi.h>
-+#include <linux/workqueue.h>
-+#include <linux/mutex.h>
-+
-+#define HSSPI_GLOBAL_CTRL_REG 0x0
-+#define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
-+#define GLOBAL_CTRL_CS_POLARITY_MASK 0x000000ff
-+#define GLOBAL_CTRL_PLL_CLK_CTRL_SHIFT 8
-+#define GLOBAL_CTRL_PLL_CLK_CTRL_MASK 0x0000ff00
-+#define GLOBAL_CTRL_CLK_GATE_SSOFF BIT(16)
-+#define GLOBAL_CTRL_CLK_POLARITY BIT(17)
-+#define GLOBAL_CTRL_MOSI_IDLE BIT(18)
-+
-+#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4
-+
-+#define HSSPI_INT_STATUS_REG 0x8
-+#define HSSPI_INT_STATUS_MASKED_REG 0xc
-+#define HSSPI_INT_MASK_REG 0x10
-+
-+#define HSSPI_PINGx_CMD_DONE(i) BIT((i * 8) + 0)
-+#define HSSPI_PINGx_RX_OVER(i) BIT((i * 8) + 1)
-+#define HSSPI_PINGx_TX_UNDER(i) BIT((i * 8) + 2)
-+#define HSSPI_PINGx_POLL_TIMEOUT(i) BIT((i * 8) + 3)
-+#define HSSPI_PINGx_CTRL_INVAL(i) BIT((i * 8) + 4)
-+
-+#define HSSPI_INT_CLEAR_ALL 0xff001f1f
-+
-+#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40)
-+#define PINGPONG_CMD_COMMAND_MASK 0xf
-+#define PINGPONG_COMMAND_NOOP 0
-+#define PINGPONG_COMMAND_START_NOW 1
-+#define PINGPONG_COMMAND_START_TRIGGER 2
-+#define PINGPONG_COMMAND_HALT 3
-+#define PINGPONG_COMMAND_FLUSH 4
-+#define PINGPONG_CMD_PROFILE_SHIFT 8
-+#define PINGPONG_CMD_SS_SHIFT 12
-+
-+#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40)
-+
-+#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20)
-+#define CLK_CTRL_FREQ_CTRL_MASK 0x0000ffff
-+#define CLK_CTRL_SPI_CLK_2X_SEL BIT(14)
-+#define CLK_CTRL_ACCUM_RST_ON_LOOP BIT(15)
-+
-+#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20)
-+#define SIGNAL_CTRL_LATCH_RISING BIT(12)
-+#define SIGNAL_CTRL_LAUNCH_RISING BIT(13)
-+#define SIGNAL_CTRL_ASYNC_INPUT_PATH BIT(16)
-+
-+#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20)
-+#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8
-+#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12
-+#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16
-+#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18
-+#define MODE_CTRL_MODE_3WIRE BIT(20)
-+#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24
-+
-+#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200)
-+
-+
-+#define HSSPI_OP_CODE_SHIFT 13
-+#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT)
-+#define HSSPI_OP_SETIRQ (4 << HSSPI_OP_CODE_SHIFT)
-+
-+#define HSSPI_BUFFER_LEN 512
-+#define HSSPI_OPCODE_LEN 2
-+
-+#define HSSPI_MAX_PREPEND_LEN 15
-+
-+#define HSSPI_MAX_SYNC_CLOCK 30000000
-+
-+#define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
-+
-+struct bcm63xx_hsspi {
-+ struct completion done;
-+ struct mutex bus_mutex;
-+
-+ struct platform_device *pdev;
-+ struct clk *clk;
-+ void __iomem *regs;
-+ u8 __iomem *fifo;
-+
-+ u32 speed_hz;
-+ u8 cs_polarity;
-+};
-+
-+static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned cs,
-+ bool active)
-+{
-+ u32 reg;
-+
-+ mutex_lock(&bs->bus_mutex);
-+ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+ reg &= ~BIT(cs);
-+ if (active == !(bs->cs_polarity & BIT(cs)))
-+ reg |= BIT(cs);
-+
-+ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ mutex_unlock(&bs->bus_mutex);
-+}
-+
-+static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
-+ struct spi_device *spi, int hz)
-+{
-+ unsigned profile = spi->chip_select;
-+ u32 reg;
-+
-+ reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
-+ __raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
-+ bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));
-+
-+ reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
-+ if (hz > HSSPI_MAX_SYNC_CLOCK)
-+ reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH;
-+ else
-+ reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH;
-+ __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
-+
-+ mutex_lock(&bs->bus_mutex);
-+ /* setup clock polarity */
-+ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ reg &= ~GLOBAL_CTRL_CLK_POLARITY;
-+ if (spi->mode & SPI_CPOL)
-+ reg |= GLOBAL_CTRL_CLK_POLARITY;
-+ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ mutex_unlock(&bs->bus_mutex);
-+}
-+
-+static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
-+{
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
-+ unsigned chip_select = spi->chip_select;
-+ u16 opcode = 0;
-+ int pending = t->len;
-+ int step_size = HSSPI_BUFFER_LEN;
-+ const u8 *tx = t->tx_buf;
-+ u8 *rx = t->rx_buf;
-+
-+ bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
-+ bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);
-+
-+ if (tx && rx)
-+ opcode = HSSPI_OP_READ_WRITE;
-+ else if (tx)
-+ opcode = HSSPI_OP_WRITE;
-+ else if (rx)
-+ opcode = HSSPI_OP_READ;
-+
-+ if (opcode != HSSPI_OP_READ)
-+ step_size -= HSSPI_OPCODE_LEN;
-+
-+ __raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
-+ 2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
-+ 2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
-+ bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
-+
-+ while (pending > 0) {
-+ int curr_step = min_t(int, step_size, pending);
-+
-+ init_completion(&bs->done);
-+ if (tx) {
-+ memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
-+ tx += curr_step;
-+ }
-+
-+ __raw_writew(opcode | curr_step, bs->fifo);
-+
-+ /* enable interrupt */
-+ __raw_writel(HSSPI_PINGx_CMD_DONE(0),
-+ bs->regs + HSSPI_INT_MASK_REG);
-+
-+ /* start the transfer */
-+ __raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT |
-+ chip_select << PINGPONG_CMD_PROFILE_SHIFT |
-+ PINGPONG_COMMAND_START_NOW,
-+ bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
-+
-+ if (wait_for_completion_timeout(&bs->done, HZ) == 0) {
-+ dev_err(&bs->pdev->dev, "transfer timed out!\n");
-+ return -ETIMEDOUT;
-+ }
-+
-+ if (rx) {
-+ memcpy_fromio(rx, bs->fifo, curr_step);
-+ rx += curr_step;
-+ }
-+
-+ pending -= curr_step;
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm63xx_hsspi_setup(struct spi_device *spi)
-+{
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
-+ u32 reg;
-+
-+ reg = __raw_readl(bs->regs +
-+ HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
-+ reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING);
-+ if (spi->mode & SPI_CPHA)
-+ reg |= SIGNAL_CTRL_LAUNCH_RISING;
-+ else
-+ reg |= SIGNAL_CTRL_LATCH_RISING;
-+ __raw_writel(reg, bs->regs +
-+ HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
-+
-+ mutex_lock(&bs->bus_mutex);
-+ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+ /* only change actual polarities if there is no transfer */
-+ if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
-+ if (spi->mode & SPI_CS_HIGH)
-+ reg |= BIT(spi->chip_select);
-+ else
-+ reg &= ~BIT(spi->chip_select);
-+ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ }
-+
-+ if (spi->mode & SPI_CS_HIGH)
-+ bs->cs_polarity |= BIT(spi->chip_select);
-+ else
-+ bs->cs_polarity &= ~BIT(spi->chip_select);
-+
-+ mutex_unlock(&bs->bus_mutex);
-+
-+ return 0;
-+}
-+
-+static int bcm63xx_hsspi_transfer_one(struct spi_master *master,
-+ struct spi_message *msg)
-+{
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+ struct spi_transfer *t;
-+ struct spi_device *spi = msg->spi;
-+ int status = -EINVAL;
-+ int dummy_cs;
-+ u32 reg;
-+
-+ /* This controller does not support keeping CS active during idle.
-+ * To work around this, we use the following ugly hack:
-+ *
-+ * a. Invert the target chip select's polarity so it will be active.
-+ * b. Select a "dummy" chip select to use as the hardware target.
-+ * c. Invert the dummy chip select's polarity so it will be inactive
-+ * during the actual transfers.
-+ * d. Tell the hardware to send to the dummy chip select. Thanks to
-+ * the multiplexed nature of SPI the actual target will receive
-+ * the transfer and we see its response.
-+ *
-+ * e. At the end restore the polarities again to their default values.
-+ */
-+
-+ dummy_cs = !spi->chip_select;
-+ bcm63xx_hsspi_set_cs(bs, dummy_cs, true);
-+
-+ list_for_each_entry(t, &msg->transfers, transfer_list) {
-+ status = bcm63xx_hsspi_do_txrx(spi, t);
-+ if (status)
-+ break;
-+
-+ msg->actual_length += t->len;
-+
-+ if (t->delay_usecs)
-+ udelay(t->delay_usecs);
-+
-+ if (t->cs_change)
-+ bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);
-+ }
-+
-+ mutex_lock(&bs->bus_mutex);
-+ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ reg &= ~GLOBAL_CTRL_CS_POLARITY_MASK;
-+ reg |= bs->cs_polarity;
-+ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ mutex_unlock(&bs->bus_mutex);
-+
-+ msg->status = status;
-+ spi_finalize_current_message(master);
-+
-+ return 0;
-+}
-+
-+static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id)
-+{
-+ struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id;
-+
-+ if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)
-+ return IRQ_NONE;
-+
-+ __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
-+ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+
-+ complete(&bs->done);
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static int bcm63xx_hsspi_probe(struct platform_device *pdev)
-+{
-+ struct spi_master *master;
-+ struct bcm63xx_hsspi *bs;
-+ struct resource *res_mem;
-+ void __iomem *regs;
-+ struct device *dev = &pdev->dev;
-+ struct clk *clk;
-+ int irq, ret;
-+ u32 reg, rate;
-+
-+ irq = platform_get_irq(pdev, 0);
-+ if (irq < 0) {
-+ dev_err(dev, "no irq\n");
-+ return -ENXIO;
-+ }
-+
-+ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ regs = devm_request_and_ioremap(dev, res_mem);
-+ if (IS_ERR(regs))
-+ return PTR_ERR(regs);
-+
-+ clk = clk_get(dev, "hsspi");
-+
-+ if (IS_ERR(clk))
-+ return PTR_ERR(clk);
-+
-+ rate = clk_get_rate(clk);
-+ if (!rate) {
-+ ret = -EINVAL;
-+ goto out_put_clk;
-+ }
-+
-+ clk_prepare_enable(clk);
-+
-+ master = spi_alloc_master(&pdev->dev, sizeof(*bs));
-+ if (!master) {
-+ ret = -ENOMEM;
-+ goto out_disable_clk;
-+ }
-+
-+ bs = spi_master_get_devdata(master);
-+ bs->pdev = pdev;
-+ bs->clk = clk;
-+ bs->regs = regs;
-+ bs->speed_hz = rate;
-+ bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
-+
-+ mutex_init(&bs->bus_mutex);
-+
-+ master->bus_num = HSSPI_BUS_NUM;
-+ master->num_chipselect = 8;
-+ master->setup = bcm63xx_hsspi_setup;
-+ master->transfer_one_message = bcm63xx_hsspi_transfer_one;
-+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
-+ master->bits_per_word_mask = SPI_BPW_MASK(8);
-+ master->auto_runtime_pm = true;
-+
-+ platform_set_drvdata(pdev, master);
-+
-+ /* Initialize the hardware */
-+ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+
-+ /* clean up any pending interrupts */
-+ __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
-+
-+ /* read out default CS polarities */
-+ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+ bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
-+ __raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF,
-+ bs->regs + HSSPI_GLOBAL_CTRL_REG);
-+
-+ ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED,
-+ pdev->name, bs);
-+
-+ if (ret)
-+ goto out_put_master;
-+
-+ /* register and we are done */
-+ ret = spi_register_master(master);
-+ if (ret)
-+ goto out_put_master;
-+
-+ return 0;
-+
-+out_put_master:
-+ spi_master_put(master);
-+out_disable_clk:
-+ clk_disable_unprepare(clk);
-+out_put_clk:
-+ clk_put(clk);
-+
-+ return ret;
-+}
-+
-+
-+static int bcm63xx_hsspi_remove(struct platform_device *pdev)
-+{
-+ struct spi_master *master = platform_get_drvdata(pdev);
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+ spi_unregister_master(master);
-+
-+ /* reset the hardware and block queue progress */
-+ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
-+ clk_disable_unprepare(bs->clk);
-+ clk_put(bs->clk);
-+
-+ return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int bcm63xx_hsspi_suspend(struct device *dev)
-+{
-+ struct spi_master *master = dev_get_drvdata(dev);
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+ spi_master_suspend(master);
-+ clk_disable(bs->clk);
-+
-+ return 0;
-+}
-+
-+static int bcm63xx_hsspi_resume(struct device *dev)
-+{
-+ struct spi_master *master = dev_get_drvdata(dev);
-+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
-+
-+ clk_enable(bs->clk);
-+ spi_master_resume(master);
-+
-+ return 0;
-+}
-+
-+static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = {
-+ .suspend = bcm63xx_hsspi_suspend,
-+ .resume = bcm63xx_hsspi_resume,
-+};
-+
-+#define BCM63XX_HSSPI_PM_OPS (&bcm63xx_hsspi_pm_ops)
-+#else
-+#define BCM63XX_HSSPI_PM_OPS NULL
-+#endif
-+
-+
-+
-+static struct platform_driver bcm63xx_hsspi_driver = {
-+ .driver = {
-+ .name = "bcm63xx-hsspi",
-+ .owner = THIS_MODULE,
-+ .pm = BCM63XX_HSSPI_PM_OPS,
-+ },
-+ .probe = bcm63xx_hsspi_probe,
-+ .remove = bcm63xx_hsspi_remove,
-+};
-+
-+module_platform_driver(bcm63xx_hsspi_driver);
-+
-+MODULE_ALIAS("platform:bcm63xx_hsspi");
-+MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");
-+MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-From f0df10fb498c21bbb201bc81dd209ea646b5a311 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 12 Nov 2011 12:19:09 +0100
-Subject: [PATCH 1/5] MIPS: BCM63XX: expose the HSSPI clock
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -226,6 +226,28 @@ static struct clk clk_spi = {
- };
-
- /*
-+ * HSSPI clock
-+ */
-+static void hsspi_set(struct clk *clk, int enable)
-+{
-+ u32 mask;
-+
-+ if (BCMCPU_IS_6328())
-+ mask = CKCTL_6328_HSSPI_EN;
-+ else if (BCMCPU_IS_6362())
-+ mask = CKCTL_6362_HSSPI_EN;
-+ else
-+ return;
-+
-+ bcm_hwclock_set(mask, enable);
-+}
-+
-+static struct clk clk_hsspi = {
-+ .set = hsspi_set,
-+};
-+
-+
-+/*
- * XTM clock
- */
- static void xtm_set(struct clk *clk, int enable)
-@@ -346,6 +368,8 @@ struct clk *clk_get(struct device *dev,
- return &clk_usbd;
- if (!strcmp(id, "spi"))
- return &clk_spi;
-+ if (!strcmp(id, "hsspi"))
-+ return &clk_hsspi;
- if (!strcmp(id, "xtm"))
- return &clk_xtm;
- if (!strcmp(id, "periph"))
+++ /dev/null
-From c8b7d2630d907025ce30989bddd01f4f0f13c103 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 20 Nov 2013 17:22:40 +0100
-Subject: [PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate
-
-Properly set up the HSSPI clock rate depending on the SoC's PLL rate.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -390,3 +390,21 @@ void clk_put(struct clk *clk)
- }
-
- EXPORT_SYMBOL(clk_put);
-+
-+#define HSSPI_PLL_HZ_6328 133333333
-+#define HSSPI_PLL_HZ_6362 400000000
-+
-+static int __init bcm63xx_clk_init(void)
-+{
-+ switch (bcm63xx_get_cpu_id()) {
-+ case BCM6328_CPU_ID:
-+ clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+ break;
-+ case BCM6362_CPU_ID:
-+ clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+ break;
-+ }
-+
-+ return 0;
-+}
-+arch_initcall(bcm63xx_clk_init);
+++ /dev/null
-From 33a6acbe47636adcd9062a0e0af7985c0df9faa5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 12 Nov 2011 12:19:55 +0100
-Subject: [PATCH 3/5] MIPS: BCM63XX: add HSSPI IRQ and register offsets
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -145,6 +145,7 @@ enum bcm63xx_regs_set {
- RSET_UART1,
- RSET_GPIO,
- RSET_SPI,
-+ RSET_HSSPI,
- RSET_UDC0,
- RSET_OHCI0,
- RSET_OHCI_PRIV,
-@@ -193,6 +194,7 @@ enum bcm63xx_regs_set {
- #define RSET_ENETDMAS_SIZE(chans) (16 * (chans))
- #define RSET_ENETSW_SIZE 65536
- #define RSET_UART_SIZE 24
-+#define RSET_HSSPI_SIZE 1536
- #define RSET_UDC_SIZE 256
- #define RSET_OHCI_SIZE 256
- #define RSET_EHCI_SIZE 256
-@@ -265,6 +267,7 @@ enum bcm63xx_regs_set {
- #define BCM_6328_UART1_BASE (0xb0000120)
- #define BCM_6328_GPIO_BASE (0xb0000080)
- #define BCM_6328_SPI_BASE (0xdeadbeef)
-+#define BCM_6328_HSSPI_BASE (0xb0001000)
- #define BCM_6328_UDC0_BASE (0xdeadbeef)
- #define BCM_6328_USBDMA_BASE (0xb000c000)
- #define BCM_6328_OHCI0_BASE (0xb0002600)
-@@ -313,6 +316,7 @@ enum bcm63xx_regs_set {
- #define BCM_6338_UART1_BASE (0xdeadbeef)
- #define BCM_6338_GPIO_BASE (0xfffe0400)
- #define BCM_6338_SPI_BASE (0xfffe0c00)
-+#define BCM_6338_HSSPI_BASE (0xdeadbeef)
- #define BCM_6338_UDC0_BASE (0xdeadbeef)
- #define BCM_6338_USBDMA_BASE (0xfffe2400)
- #define BCM_6338_OHCI0_BASE (0xdeadbeef)
-@@ -360,6 +364,7 @@ enum bcm63xx_regs_set {
- #define BCM_6345_UART1_BASE (0xdeadbeef)
- #define BCM_6345_GPIO_BASE (0xfffe0400)
- #define BCM_6345_SPI_BASE (0xdeadbeef)
-+#define BCM_6345_HSSPI_BASE (0xdeadbeef)
- #define BCM_6345_UDC0_BASE (0xdeadbeef)
- #define BCM_6345_USBDMA_BASE (0xfffe2800)
- #define BCM_6345_ENET0_BASE (0xfffe1800)
-@@ -406,6 +411,7 @@ enum bcm63xx_regs_set {
- #define BCM_6348_UART1_BASE (0xdeadbeef)
- #define BCM_6348_GPIO_BASE (0xfffe0400)
- #define BCM_6348_SPI_BASE (0xfffe0c00)
-+#define BCM_6348_HSSPI_BASE (0xdeadbeef)
- #define BCM_6348_UDC0_BASE (0xfffe1000)
- #define BCM_6348_USBDMA_BASE (0xdeadbeef)
- #define BCM_6348_OHCI0_BASE (0xfffe1b00)
-@@ -451,6 +457,7 @@ enum bcm63xx_regs_set {
- #define BCM_6358_UART1_BASE (0xfffe0120)
- #define BCM_6358_GPIO_BASE (0xfffe0080)
- #define BCM_6358_SPI_BASE (0xfffe0800)
-+#define BCM_6358_HSSPI_BASE (0xdeadbeef)
- #define BCM_6358_UDC0_BASE (0xfffe0800)
- #define BCM_6358_USBDMA_BASE (0xdeadbeef)
- #define BCM_6358_OHCI0_BASE (0xfffe1400)
-@@ -553,6 +560,7 @@ enum bcm63xx_regs_set {
- #define BCM_6368_UART1_BASE (0xb0000120)
- #define BCM_6368_GPIO_BASE (0xb0000080)
- #define BCM_6368_SPI_BASE (0xb0000800)
-+#define BCM_6368_HSSPI_BASE (0xdeadbeef)
- #define BCM_6368_UDC0_BASE (0xdeadbeef)
- #define BCM_6368_USBDMA_BASE (0xb0004800)
- #define BCM_6368_OHCI0_BASE (0xb0001600)
-@@ -604,6 +612,7 @@ extern const unsigned long *bcm63xx_regs
- __GEN_RSET_BASE(__cpu, UART1) \
- __GEN_RSET_BASE(__cpu, GPIO) \
- __GEN_RSET_BASE(__cpu, SPI) \
-+ __GEN_RSET_BASE(__cpu, HSSPI) \
- __GEN_RSET_BASE(__cpu, UDC0) \
- __GEN_RSET_BASE(__cpu, OHCI0) \
- __GEN_RSET_BASE(__cpu, OHCI_PRIV) \
-@@ -647,6 +656,7 @@ extern const unsigned long *bcm63xx_regs
- [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \
- [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \
- [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \
-+ [RSET_HSSPI] = BCM_## __cpu ##_HSSPI_BASE, \
- [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \
- [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \
- [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \
-@@ -727,6 +737,7 @@ enum bcm63xx_irq {
- IRQ_ENET0,
- IRQ_ENET1,
- IRQ_ENET_PHY,
-+ IRQ_HSSPI,
- IRQ_OHCI0,
- IRQ_EHCI0,
- IRQ_USBD,
-@@ -815,6 +826,7 @@ enum bcm63xx_irq {
- #define BCM_6328_ENET0_IRQ 0
- #define BCM_6328_ENET1_IRQ 0
- #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
-+#define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
- #define BCM_6328_OHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 9)
- #define BCM_6328_EHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 10)
- #define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
-@@ -860,6 +872,7 @@ enum bcm63xx_irq {
- #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
- #define BCM_6338_ENET1_IRQ 0
- #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6338_HSSPI_IRQ 0
- #define BCM_6338_OHCI0_IRQ 0
- #define BCM_6338_EHCI0_IRQ 0
- #define BCM_6338_USBD_IRQ 0
-@@ -898,6 +911,7 @@ enum bcm63xx_irq {
- #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
- #define BCM_6345_ENET1_IRQ 0
- #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
-+#define BCM_6345_HSSPI_IRQ 0
- #define BCM_6345_OHCI0_IRQ 0
- #define BCM_6345_EHCI0_IRQ 0
- #define BCM_6345_USBD_IRQ 0
-@@ -936,6 +950,7 @@ enum bcm63xx_irq {
- #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
- #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
- #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6348_HSSPI_IRQ 0
- #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
- #define BCM_6348_EHCI0_IRQ 0
- #define BCM_6348_USBD_IRQ 0
-@@ -974,6 +989,7 @@ enum bcm63xx_irq {
- #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
- #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
- #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6358_HSSPI_IRQ 0
- #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
- #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
- #define BCM_6358_USBD_IRQ 0
-@@ -1086,6 +1102,7 @@ enum bcm63xx_irq {
- #define BCM_6368_ENET0_IRQ 0
- #define BCM_6368_ENET1_IRQ 0
- #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15)
-+#define BCM_6368_HSSPI_IRQ 0
- #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
- #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7)
- #define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8)
-@@ -1133,6 +1150,7 @@ extern const int *bcm63xx_irqs;
- [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \
- [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \
- [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \
-+ [IRQ_HSSPI] = BCM_## __cpu ##_HSSPI_IRQ, \
- [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \
- [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \
- [IRQ_USBD] = BCM_## __cpu ##_USBD_IRQ, \
+++ /dev/null
-From ad04c99347cf9e583457f7258e97f0be22fad2ec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 12 Nov 2011 12:18:26 +0100
-Subject: [PATCH 4/5] MIPS: BCM63XX: add HSSPI platform device and register it
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 4 +-
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++
- arch/mips/bcm63xx/dev-hsspi.c | 47 ++++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 8 ++++
- 4 files changed, 60 insertions(+), 2 deletions(-)
- create mode 100644 arch/mips/bcm63xx/dev-hsspi.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
-- dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
-- dev-usb-usbd.o
-+ dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \
-+ dev-wdt.o dev-usb-usbd.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -23,6 +23,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_dsp.h>
- #include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -915,6 +916,8 @@ int __init board_register_devices(void)
-
- bcm63xx_spi_register();
-
-+ bcm63xx_hsspi_register();
-+
- bcm63xx_flash_register();
-
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -0,0 +1,47 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_regs.h>
-+
-+static struct resource spi_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct platform_device bcm63xx_hsspi_device = {
-+ .name = "bcm63xx-hsspi",
-+ .id = 0,
-+ .num_resources = ARRAY_SIZE(spi_resources),
-+ .resource = spi_resources,
-+};
-+
-+int __init bcm63xx_hsspi_register(void)
-+{
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+ return -ENODEV;
-+
-+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
-+ spi_resources[0].end = spi_resources[0].start;
-+ spi_resources[0].end += RSET_HSSPI_SIZE - 1;
-+ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
-+
-+ return platform_device_register(&bcm63xx_hsspi_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-@@ -0,0 +1,8 @@
-+#ifndef BCM63XX_DEV_HSSPI_H
-+#define BCM63XX_DEV_HSSPI_H
-+
-+#include <linux/types.h>
-+
-+int bcm63xx_hsspi_register(void);
-+
-+#endif /* BCM63XX_DEV_HSSPI_H */
+++ /dev/null
-From 4d8fa9d3d1fe1d70fe7d59537acf49797f6010a1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 1 Dec 2013 16:19:46 +0100
-Subject: [PATCH 2/2] spi/bcm63xx: don't reject reads >= 256 bytes
-
-The rx_tail register is only 8 bit wide, so it will wrap around
-after 256 read bytes. This makes it rather meaningless, so drop any
-usage of it to not treat reads over 256 as failed.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/spi/spi-bcm63xx.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -205,13 +205,7 @@ static int bcm63xx_txrx_bufs(struct spi_
- if (!timeout)
- return -ETIMEDOUT;
-
-- /* read out all data */
-- rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
--
-- if (do_rx && rx_tail != len)
-- return -EIO;
--
-- if (!rx_tail)
-+ if (!do_rx)
- return 0;
-
- len = 0;
+++ /dev/null
-From 8bd8f46cbc709974b26396aa440133db4484015e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 28 Jun 2013 00:25:13 +0200
-Subject: [PATCH V2 01/13] MIPS: BCM63XX: disable SMP also on BCM3368
-
-BCM3368 has the same shared TLB as BCM6358.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/prom.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -64,9 +64,9 @@ void __init prom_init(void)
- register_smp_ops(&bmips_smp_ops);
-
- /*
-- * BCM6328 might not have its second CPU enabled, while BCM6358
-- * needs special handling for its shared TLB, so disable SMP
-- * for now.
-+ * BCM6328 might not have its second CPU enabled, while BCM3368
-+ * and BCM6358 need special handling for their shared TLB, so
-+ * disable SMP for now.
- */
- if (BCMCPU_IS_6328()) {
- reg = bcm_readl(BCM_6328_OTP_BASE +
-@@ -74,7 +74,7 @@ void __init prom_init(void)
-
- if (reg & OTP_6328_REG3_TP1_DISABLED)
- bmips_smp_enabled = 0;
-- } else if (BCMCPU_IS_6358()) {
-+ } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- bmips_smp_enabled = 0;
- }
-
+++ /dev/null
-From 72a1c3ad0392d7b42bf50e6ecade63a775166c73 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 27 Jun 2013 21:32:41 +0200
-Subject: [PATCH V2 02/13] MIPS: allow asm/cpu.h to be included from assembly
-
-Add guards around the enum to allow including cpu.h from assembly.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/cpu.h | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/arch/mips/include/asm/cpu.h
-+++ b/arch/mips/include/asm/cpu.h
-@@ -249,6 +249,8 @@
-
- #define FPIR_IMP_NONE 0x0000
-
-+#if !defined(__ASSEMBLY__)
-+
- enum cpu_type_enum {
- CPU_UNKNOWN,
-
-@@ -301,6 +303,7 @@ enum cpu_type_enum {
- CPU_LAST
- };
-
-+#endif /* !__ASSEMBLY */
-
- /*
- * ISA Level encodings
+++ /dev/null
-From 7d790bd6cab314462a29ba194e243b8b1d529524 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 27 Jun 2013 21:33:56 +0200
-Subject: [PATCH V2 03/13] MIPS: BMIPS: change compile time checks to runtime
- checks
-
-Allow building for all bmips cpus at the same time by changing ifdefs
-to checks for the cpu type, or adding appropriate checks to the
-assembly.
-
-Since BMIPS43XX and BMIPS5000 require different IPI implementations,
-split the SMP ops into one for each, so the runtime overhead is only
-at registration time for them.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
-V1 -> V2:
- * use switch (cpu_type()) instead of if () else if () ...
- * split the smp ops into bmips43xx and bmips5000
-
- arch/mips/bcm63xx/prom.c | 2 +-
- arch/mips/include/asm/bmips.h | 3 +-
- arch/mips/kernel/bmips_vec.S | 55 ++++++--
- arch/mips/kernel/smp-bmips.c | 312 +++++++++++++++++++++++++-----------------
- 4 files changed, 235 insertions(+), 137 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -61,7 +61,7 @@ void __init prom_init(void)
-
- if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
- /* set up SMP */
-- register_smp_ops(&bmips_smp_ops);
-+ register_smp_ops(&bmips43xx_smp_ops);
-
- /*
- * BCM6328 might not have its second CPU enabled, while BCM3368
---- a/arch/mips/include/asm/bmips.h
-+++ b/arch/mips/include/asm/bmips.h
-@@ -47,7 +47,8 @@
- #include <linux/cpumask.h>
- #include <asm/r4kcache.h>
-
--extern struct plat_smp_ops bmips_smp_ops;
-+extern struct plat_smp_ops bmips43xx_smp_ops;
-+extern struct plat_smp_ops bmips5000_smp_ops;
- extern char bmips_reset_nmi_vec;
- extern char bmips_reset_nmi_vec_end;
- extern char bmips_smp_movevec;
---- a/arch/mips/kernel/bmips_vec.S
-+++ b/arch/mips/kernel/bmips_vec.S
-@@ -13,6 +13,7 @@
- #include <asm/asm.h>
- #include <asm/asmmacro.h>
- #include <asm/cacheops.h>
-+#include <asm/cpu.h>
- #include <asm/regdef.h>
- #include <asm/mipsregs.h>
- #include <asm/stackframe.h>
-@@ -91,12 +92,18 @@ NESTED(bmips_reset_nmi_vec, PT_SIZE, sp)
- beqz k0, bmips_smp_entry
-
- #if defined(CONFIG_CPU_BMIPS5000)
-+ mfc0 k0, CP0_PRID
-+ li k1, PRID_IMP_BMIPS5000
-+ andi k0, 0xff00
-+ bne k0, k1, 1f
-+
- /* if we're not on core 0, this must be the SMP boot signal */
- li k1, (3 << 25)
- mfc0 k0, $22
- and k0, k1
- bnez k0, bmips_smp_entry
--#endif
-+1:
-+#endif /* CONFIG_CPU_BMIPS5000 */
- #endif /* CONFIG_SMP */
-
- /* nope, it's just a regular NMI */
-@@ -139,7 +146,12 @@ bmips_smp_entry:
- xori k0, 0x04
- mtc0 k0, CP0_CONFIG
-
-+ mfc0 k0, CP0_PRID
-+ andi k0, 0xff00
- #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-+ li k1, PRID_IMP_BMIPS43XX
-+ bne k0, k1, 2f
-+
- /* initialize CPU1's local I-cache */
- li k0, 0x80000000
- li k1, 0x80010000
-@@ -150,14 +162,21 @@ bmips_smp_entry:
- 1: cache Index_Store_Tag_I, 0(k0)
- addiu k0, 16
- bne k0, k1, 1b
--#elif defined(CONFIG_CPU_BMIPS5000)
-+
-+ b 3f
-+2:
-+#endif /* CONFIG_CPU_BMIPS4350 || CONFIG_CPU_BMIPS4380 */
-+#if defined(CONFIG_CPU_BMIPS5000)
- /* set exception vector base */
-+ li k1, PRID_IMP_BMIPS5000
-+ bne k0, k1, 3f
-+
- la k0, ebase
- lw k0, 0(k0)
- mtc0 k0, $15, 1
- BARRIER
--#endif
--
-+#endif /* CONFIG_CPU_BMIPS5000 */
-+3:
- /* jump back to kseg0 in case we need to remap the kseg1 area */
- la k0, 1f
- jr k0
-@@ -221,8 +240,18 @@ END(bmips_smp_int_vec)
- LEAF(bmips_enable_xks01)
-
- #if defined(CONFIG_XKS01)
--
-+ mfc0 t0, CP0_PRID
-+ andi t2, t0, 0xff00
- #if defined(CONFIG_CPU_BMIPS4380)
-+ li t1, PRID_IMP_BMIPS43XX
-+ bne t2, t1, 1f
-+
-+ andi t0, 0xff
-+ addiu t1, t0, -PRID_REV_BMIPS4380_HI
-+ bgtz t1, 2f
-+ addiu t0, -PRID_REV_BMIPS4380_LO
-+ bltz t0, 2f
-+
- mfc0 t0, $22, 3
- li t1, 0x1ff0
- li t2, (1 << 12) | (1 << 9)
-@@ -231,7 +260,13 @@ LEAF(bmips_enable_xks01)
- or t0, t2
- mtc0 t0, $22, 3
- BARRIER
--#elif defined(CONFIG_CPU_BMIPS5000)
-+ b 2f
-+1:
-+#endif /* CONFIG_CPU_BMIPS4380 */
-+#if defined(CONFIG_CPU_BMIPS5000)
-+ li t1, PRID_IMP_BMIPS5000
-+ bne t2, t1, 2f
-+
- mfc0 t0, $22, 5
- li t1, 0x01ff
- li t2, (1 << 8) | (1 << 5)
-@@ -240,12 +275,8 @@ LEAF(bmips_enable_xks01)
- or t0, t2
- mtc0 t0, $22, 5
- BARRIER
--#else
--
--#error Missing XKS01 setup
--
--#endif
--
-+#endif /* CONFIG_CPU_BMIPS5000 */
-+2:
- #endif /* defined(CONFIG_XKS01) */
-
- jr ra
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -49,8 +49,10 @@ cpumask_t bmips_booted_mask;
- unsigned long bmips_smp_boot_sp;
- unsigned long bmips_smp_boot_gp;
-
--static void bmips_send_ipi_single(int cpu, unsigned int action);
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id);
-+static void bmips43xx_send_ipi_single(int cpu, unsigned int action);
-+static void bmips5000_send_ipi_single(int cpu, unsigned int action);
-+static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id);
-+static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id);
-
- /* SW interrupts 0,1 are used for interprocessor signaling */
- #define IPI0_IRQ (MIPS_CPU_IRQ_BASE + 0)
-@@ -64,49 +66,58 @@ static irqreturn_t bmips_ipi_interrupt(i
- static void __init bmips_smp_setup(void)
- {
- int i, cpu = 1, boot_cpu = 0;
--
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
- int cpu_hw_intr;
-
-- /* arbitration priority */
-- clear_c0_brcm_cmt_ctrl(0x30);
--
-- /* NBK and weak order flags */
-- set_c0_brcm_config_0(0x30000);
--
-- /* Find out if we are running on TP0 or TP1 */
-- boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
--
-- /*
-- * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
-- * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
-- * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
-- */
-- if (boot_cpu == 0)
-- cpu_hw_intr = 0x02;
-- else
-- cpu_hw_intr = 0x1d;
--
-- change_c0_brcm_cmt_intr(0xf8018000, (cpu_hw_intr << 27) | (0x03 << 15));
--
-- /* single core, 2 threads (2 pipelines) */
-- max_cpus = 2;
--#elif defined(CONFIG_CPU_BMIPS5000)
-- /* enable raceless SW interrupts */
-- set_c0_brcm_config(0x03 << 22);
--
-- /* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */
-- change_c0_brcm_mode(0x1f << 27, 0x02 << 27);
--
-- /* N cores, 2 threads per core */
-- max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1;
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ /* arbitration priority */
-+ clear_c0_brcm_cmt_ctrl(0x30);
-+
-+ /* NBK and weak order flags */
-+ set_c0_brcm_config_0(0x30000);
-+
-+ /* Find out if we are running on TP0 or TP1 */
-+ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+
-+ /*
-+ * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other
-+ * thread
-+ * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
-+ * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
-+ */
-+ if (boot_cpu == 0)
-+ cpu_hw_intr = 0x02;
-+ else
-+ cpu_hw_intr = 0x1d;
-+
-+ change_c0_brcm_cmt_intr(0xf8018000,
-+ (cpu_hw_intr << 27) | (0x03 << 15));
-+
-+ /* single core, 2 threads (2 pipelines) */
-+ max_cpus = 2;
-+
-+ break;
-+ case CPU_BMIPS5000:
-+ /* enable raceless SW interrupts */
-+ set_c0_brcm_config(0x03 << 22);
-+
-+ /* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */
-+ change_c0_brcm_mode(0x1f << 27, 0x02 << 27);
-+
-+ /* N cores, 2 threads per core */
-+ max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1;
-+
-+ /* clear any pending SW interrupts */
-+ for (i = 0; i < max_cpus; i++) {
-+ write_c0_brcm_action(ACTION_CLR_IPI(i, 0));
-+ write_c0_brcm_action(ACTION_CLR_IPI(i, 1));
-+ }
-
-- /* clear any pending SW interrupts */
-- for (i = 0; i < max_cpus; i++) {
-- write_c0_brcm_action(ACTION_CLR_IPI(i, 0));
-- write_c0_brcm_action(ACTION_CLR_IPI(i, 1));
-+ break;
-+ default:
-+ max_cpus = 1;
- }
--#endif
-
- if (!bmips_smp_enabled)
- max_cpus = 1;
-@@ -134,6 +145,20 @@ static void __init bmips_smp_setup(void)
- */
- static void bmips_prepare_cpus(unsigned int max_cpus)
- {
-+ irqreturn_t (*bmips_ipi_interrupt)(int irq, void *dev_id);
-+
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ bmips_ipi_interrupt = bmips43xx_ipi_interrupt;
-+ break;
-+ case CPU_BMIPS5000:
-+ bmips_ipi_interrupt = bmips5000_ipi_interrupt;
-+ break;
-+ default:
-+ return;
-+ }
-+
- if (request_irq(IPI0_IRQ, bmips_ipi_interrupt, IRQF_PERCPU,
- "smp_ipi0", NULL))
- panic("Can't request IPI0 interrupt");
-@@ -168,26 +193,39 @@ static void bmips_boot_secondary(int cpu
-
- pr_info("SMP: Booting CPU%d...\n", cpu);
-
-- if (cpumask_test_cpu(cpu, &bmips_booted_mask))
-- bmips_send_ipi_single(cpu, 0);
-+ if (cpumask_test_cpu(cpu, &bmips_booted_mask)) {
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ bmips43xx_send_ipi_single(cpu, 0);
-+ break;
-+ case CPU_BMIPS5000:
-+ bmips5000_send_ipi_single(cpu, 0);
-+ break;
-+ }
-+ }
- else {
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-- /* Reset slave TP1 if booting from TP0 */
-- if (cpu_logical_map(cpu) == 1)
-- set_c0_brcm_cmt_ctrl(0x01);
--#elif defined(CONFIG_CPU_BMIPS5000)
-- if (cpu & 0x01)
-- write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
-- else {
-- /*
-- * core N thread 0 was already booted; just
-- * pulse the NMI line
-- */
-- bmips_write_zscm_reg(0x210, 0xc0000000);
-- udelay(10);
-- bmips_write_zscm_reg(0x210, 0x00);
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ /* Reset slave TP1 if booting from TP0 */
-+ if (cpu_logical_map(cpu) == 1)
-+ set_c0_brcm_cmt_ctrl(0x01);
-+ break;
-+ case CPU_BMIPS5000:
-+ if (cpu & 0x01)
-+ write_c0_brcm_action(ACTION_BOOT_THREAD(cpu));
-+ else {
-+ /*
-+ * core N thread 0 was already booted; just
-+ * pulse the NMI line
-+ */
-+ bmips_write_zscm_reg(0x210, 0xc0000000);
-+ udelay(10);
-+ bmips_write_zscm_reg(0x210, 0x00);
-+ }
-+ break;
- }
--#endif
- cpumask_set_cpu(cpu, &bmips_booted_mask);
- }
- }
-@@ -199,26 +237,32 @@ static void bmips_init_secondary(void)
- {
- /* move NMI vector to kseg0, in case XKS01 is enabled */
-
--#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
-- void __iomem *cbr = BMIPS_GET_CBR();
-+ void __iomem *cbr;
- unsigned long old_vec;
- unsigned long relo_vector;
- int boot_cpu;
-
-- boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-- relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
-- BMIPS_RELO_VECTOR_CONTROL_1;
--
-- old_vec = __raw_readl(cbr + relo_vector);
-- __raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
--
-- clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
--#elif defined(CONFIG_CPU_BMIPS5000)
-- write_c0_brcm_bootvec(read_c0_brcm_bootvec() &
-- (smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000));
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ cbr = BMIPS_GET_CBR();
-+
-+ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
-+ relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
-+ BMIPS_RELO_VECTOR_CONTROL_1;
-+
-+ old_vec = __raw_readl(cbr + relo_vector);
-+ __raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
-+
-+ clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
-+ break;
-+ case CPU_BMIPS5000:
-+ write_c0_brcm_bootvec(read_c0_brcm_bootvec() &
-+ (smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000));
-
-- write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
--#endif
-+ write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
-+ break;
-+ }
- }
-
- /*
-@@ -243,8 +287,6 @@ static void bmips_cpus_done(void)
- {
- }
-
--#if defined(CONFIG_CPU_BMIPS5000)
--
- /*
- * BMIPS5000 raceless IPIs
- *
-@@ -253,12 +295,12 @@ static void bmips_cpus_done(void)
- * IPI1 is used for SMP_CALL_FUNCTION
- */
-
--static void bmips_send_ipi_single(int cpu, unsigned int action)
-+static void bmips5000_send_ipi_single(int cpu, unsigned int action)
- {
- write_c0_brcm_action(ACTION_SET_IPI(cpu, action == SMP_CALL_FUNCTION));
- }
-
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id)
-+static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id)
- {
- int action = irq - IPI0_IRQ;
-
-@@ -272,7 +314,14 @@ static irqreturn_t bmips_ipi_interrupt(i
- return IRQ_HANDLED;
- }
-
--#else
-+static void bmips5000_send_ipi_mask(const struct cpumask *mask,
-+ unsigned int action)
-+{
-+ unsigned int i;
-+
-+ for_each_cpu(i, mask)
-+ bmips5000_send_ipi_single(i, action);
-+}
-
- /*
- * BMIPS43xx racey IPIs
-@@ -287,7 +336,7 @@ static irqreturn_t bmips_ipi_interrupt(i
- static DEFINE_SPINLOCK(ipi_lock);
- static DEFINE_PER_CPU(int, ipi_action_mask);
-
--static void bmips_send_ipi_single(int cpu, unsigned int action)
-+static void bmips43xx_send_ipi_single(int cpu, unsigned int action)
- {
- unsigned long flags;
-
-@@ -298,7 +347,7 @@ static void bmips_send_ipi_single(int cp
- spin_unlock_irqrestore(&ipi_lock, flags);
- }
-
--static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id)
-+static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id)
- {
- unsigned long flags;
- int action, cpu = irq - IPI0_IRQ;
-@@ -317,15 +366,13 @@ static irqreturn_t bmips_ipi_interrupt(i
- return IRQ_HANDLED;
- }
-
--#endif /* BMIPS type */
--
--static void bmips_send_ipi_mask(const struct cpumask *mask,
-+static void bmips43xx_send_ipi_mask(const struct cpumask *mask,
- unsigned int action)
- {
- unsigned int i;
-
- for_each_cpu(i, mask)
-- bmips_send_ipi_single(i, action);
-+ bmips43xx_send_ipi_single(i, action);
- }
-
- #ifdef CONFIG_HOTPLUG_CPU
-@@ -381,15 +428,30 @@ void __ref play_dead(void)
-
- #endif /* CONFIG_HOTPLUG_CPU */
-
--struct plat_smp_ops bmips_smp_ops = {
-+struct plat_smp_ops bmips43xx_smp_ops = {
-+ .smp_setup = bmips_smp_setup,
-+ .prepare_cpus = bmips_prepare_cpus,
-+ .boot_secondary = bmips_boot_secondary,
-+ .smp_finish = bmips_smp_finish,
-+ .init_secondary = bmips_init_secondary,
-+ .cpus_done = bmips_cpus_done,
-+ .send_ipi_single = bmips43xx_send_ipi_single,
-+ .send_ipi_mask = bmips43xx_send_ipi_mask,
-+#ifdef CONFIG_HOTPLUG_CPU
-+ .cpu_disable = bmips_cpu_disable,
-+ .cpu_die = bmips_cpu_die,
-+#endif
-+};
-+
-+struct plat_smp_ops bmips5000_smp_ops = {
- .smp_setup = bmips_smp_setup,
- .prepare_cpus = bmips_prepare_cpus,
- .boot_secondary = bmips_boot_secondary,
- .smp_finish = bmips_smp_finish,
- .init_secondary = bmips_init_secondary,
- .cpus_done = bmips_cpus_done,
-- .send_ipi_single = bmips_send_ipi_single,
-- .send_ipi_mask = bmips_send_ipi_mask,
-+ .send_ipi_single = bmips5000_send_ipi_single,
-+ .send_ipi_mask = bmips5000_send_ipi_mask,
- #ifdef CONFIG_HOTPLUG_CPU
- .cpu_disable = bmips_cpu_disable,
- .cpu_die = bmips_cpu_die,
-@@ -427,43 +489,47 @@ void bmips_ebase_setup(void)
-
- BUG_ON(ebase != CKSEG0);
-
--#if defined(CONFIG_CPU_BMIPS4350)
-- /*
-- * BMIPS4350 cannot relocate the normal vectors, but it
-- * can relocate the BEV=1 vectors. So CPU1 starts up at
-- * the relocated BEV=1, IV=0 general exception vector @
-- * 0xa000_0380.
-- *
-- * set_uncached_handler() is used here because:
-- * - CPU1 will run this from uncached space
-- * - None of the cacheflush functions are set up yet
-- */
-- set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0,
-- &bmips_smp_int_vec, 0x80);
-- __sync();
-- return;
--#elif defined(CONFIG_CPU_BMIPS4380)
-- /*
-- * 0x8000_0000: reset/NMI (initially in kseg1)
-- * 0x8000_0400: normal vectors
-- */
-- new_ebase = 0x80000400;
-- cbr = BMIPS_GET_CBR();
-- __raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0);
-- __raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
--#elif defined(CONFIG_CPU_BMIPS5000)
-- /*
-- * 0x8000_0000: reset/NMI (initially in kseg1)
-- * 0x8000_1000: normal vectors
-- */
-- new_ebase = 0x80001000;
-- write_c0_brcm_bootvec(0xa0088008);
-- write_c0_ebase(new_ebase);
-- if (max_cpus > 2)
-- bmips_write_zscm_reg(0xa0, 0xa008a008);
--#else
-- return;
--#endif
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS4350:
-+ /*
-+ * BMIPS4350 cannot relocate the normal vectors, but it
-+ * can relocate the BEV=1 vectors. So CPU1 starts up at
-+ * the relocated BEV=1, IV=0 general exception vector @
-+ * 0xa000_0380.
-+ *
-+ * set_uncached_handler() is used here because:
-+ * - CPU1 will run this from uncached space
-+ * - None of the cacheflush functions are set up yet
-+ */
-+ set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0,
-+ &bmips_smp_int_vec, 0x80);
-+ __sync();
-+ return;
-+ case CPU_BMIPS4380:
-+ /*
-+ * 0x8000_0000: reset/NMI (initially in kseg1)
-+ * 0x8000_0400: normal vectors
-+ */
-+ new_ebase = 0x80000400;
-+ cbr = BMIPS_GET_CBR();
-+ __raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0);
-+ __raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1);
-+ break;
-+ case CPU_BMIPS5000:
-+ /*
-+ * 0x8000_0000: reset/NMI (initially in kseg1)
-+ * 0x8000_1000: normal vectors
-+ */
-+ new_ebase = 0x80001000;
-+ write_c0_brcm_bootvec(0xa0088008);
-+ write_c0_ebase(new_ebase);
-+ if (max_cpus > 2)
-+ bmips_write_zscm_reg(0xa0, 0xa008a008);
-+ break;
-+ default:
-+ return;
-+ }
-+
- board_nmi_handler_setup = &bmips_nmi_handler_setup;
- ebase = new_ebase;
- }
+++ /dev/null
-From 81d6f5e024884ce904b7bd36fec60291d751df48 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 27 Jun 2013 23:57:20 +0200
-Subject: [PATCH V2 04/13] MIPS: BMIPS: merge CPU options into one option
-
-Instead of treating each flavour as an exclusive CPU to select, make
-BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which
-flavours to include support.
-
-Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380
-and BMIPS5000.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
-V1 -> V2:
- * Let the SYS_HAS_CPU_BMIPS* symbols select SYS_HAS_CPU_BMIPS instead of
- requiring users to select it
-
- arch/mips/Kconfig | 80 +++++++++++++++++++++++++++----------------------------
- 1 file changed, 39 insertions(+), 41 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1396,41 +1396,21 @@ config CPU_CAVIUM_OCTEON
- can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
- Full details can be found at http://www.caviumnetworks.com.
-
--config CPU_BMIPS3300
-- bool "BMIPS3300"
-- depends on SYS_HAS_CPU_BMIPS3300
-- select CPU_BMIPS
-- help
-- Broadcom BMIPS3300 processors.
--
--config CPU_BMIPS4350
-- bool "BMIPS4350"
-- depends on SYS_HAS_CPU_BMIPS4350
-- select CPU_BMIPS
-- select SYS_SUPPORTS_SMP
-- select SYS_SUPPORTS_HOTPLUG_CPU
-- help
-- Broadcom BMIPS4350 ("VIPER") processors.
--
--config CPU_BMIPS4380
-- bool "BMIPS4380"
-- depends on SYS_HAS_CPU_BMIPS4380
-- select CPU_BMIPS
-- select SYS_SUPPORTS_SMP
-- select SYS_SUPPORTS_HOTPLUG_CPU
-- help
-- Broadcom BMIPS4380 processors.
--
--config CPU_BMIPS5000
-- bool "BMIPS5000"
-- depends on SYS_HAS_CPU_BMIPS5000
-- select CPU_BMIPS
-- select CPU_SUPPORTS_HIGHMEM
-- select MIPS_CPU_SCACHE
-- select SYS_SUPPORTS_SMP
-- select SYS_SUPPORTS_HOTPLUG_CPU
-+config CPU_BMIPS
-+ bool "Broadcom BMIPS"
-+ depends on SYS_HAS_CPU_BMIPS
-+ select CPU_MIPS32
-+ select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300
-+ select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
-+ select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
-+ select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
-+ select CPU_SUPPORTS_32BIT_KERNEL
-+ select DMA_NONCOHERENT
-+ select IRQ_CPU
-+ select SWAP_IO_SPACE
-+ select WEAK_ORDERING
- help
-- Broadcom BMIPS5000 processors.
-+ Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
-
- config CPU_XLR
- bool "Netlogic XLR SoC"
-@@ -1513,14 +1493,25 @@ config CPU_LOONGSON1
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_HIGHMEM
-
--config CPU_BMIPS
-+config CPU_BMIPS3300
- bool
-- select CPU_MIPS32
-- select CPU_SUPPORTS_32BIT_KERNEL
-- select DMA_NONCOHERENT
-- select IRQ_CPU
-- select SWAP_IO_SPACE
-- select WEAK_ORDERING
-+
-+config CPU_BMIPS4350
-+ bool
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+
-+config CPU_BMIPS4380
-+ bool
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-+
-+config CPU_BMIPS5000
-+ bool
-+ select CPU_SUPPORTS_HIGHMEM
-+ select MIPS_CPU_SCACHE
-+ select SYS_SUPPORTS_SMP
-+ select SYS_SUPPORTS_HOTPLUG_CPU
-
- config SYS_HAS_CPU_LOONGSON2E
- bool
-@@ -1594,17 +1585,24 @@ config SYS_HAS_CPU_SB1
- config SYS_HAS_CPU_CAVIUM_OCTEON
- bool
-
-+config SYS_HAS_CPU_BMIPS
-+ bool
-+
- config SYS_HAS_CPU_BMIPS3300
- bool
-+ select SYS_HAS_CPU_BMIPS
-
- config SYS_HAS_CPU_BMIPS4350
- bool
-+ select SYS_HAS_CPU_BMIPS
-
- config SYS_HAS_CPU_BMIPS4380
- bool
-+ select SYS_HAS_CPU_BMIPS
-
- config SYS_HAS_CPU_BMIPS5000
- bool
-+ select SYS_HAS_CPU_BMIPS
-
- config SYS_HAS_CPU_XLR
- bool
+++ /dev/null
-From 89d4a38dde99a6b141e90860fca594a9ac66336b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 16 Jul 2013 14:02:57 +0200
-Subject: [PATCH V2 05/13] MIPS: BMIPS: select CPU_SUPPORTS_HIGHMEM
-
-All BMIPS CPUs support HIGHMEM, so it should be selected by CPU_BMIPS.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1409,6 +1409,7 @@ config CPU_BMIPS
- select IRQ_CPU
- select SWAP_IO_SPACE
- select WEAK_ORDERING
-+ select CPU_SUPPORTS_HIGHMEM
- help
- Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
-
-@@ -1508,7 +1509,6 @@ config CPU_BMIPS4380
-
- config CPU_BMIPS5000
- bool
-- select CPU_SUPPORTS_HIGHMEM
- select MIPS_CPU_SCACHE
- select SYS_SUPPORTS_SMP
- select SYS_SUPPORTS_HOTPLUG_CPU
+++ /dev/null
-From 58827e709eb7a2e0899260893a5c9c58eb0c5db1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 16 Jul 2013 14:04:40 +0200
-Subject: [PATCH V2 06/13] MIPS: BMIPS: select CPU_HAS_PREFETCH
-
-As they are MIPS32 CPUs they do support the prefetch opcode.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1410,6 +1410,7 @@ config CPU_BMIPS
- select SWAP_IO_SPACE
- select WEAK_ORDERING
- select CPU_SUPPORTS_HIGHMEM
-+ select CPU_HAS_PREFETCH
- help
- Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
-
+++ /dev/null
-From e742d5b77ec18926293ec5d101470522f67ee159 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 15 Aug 2013 12:10:11 +0200
-Subject: [PATCH V2 07/13] MIPS: BMIPS: extend BMIPS3300 to include BMIPS32
-
-Codewise there is no difference between these two, so it does not make
-sense to treat them differently. Also chip families having one of these
-tend to have the other.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1400,7 +1400,7 @@ config CPU_BMIPS
- bool "Broadcom BMIPS"
- depends on SYS_HAS_CPU_BMIPS
- select CPU_MIPS32
-- select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300
-+ select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
- select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
- select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
- select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
-@@ -1412,7 +1412,7 @@ config CPU_BMIPS
- select CPU_SUPPORTS_HIGHMEM
- select CPU_HAS_PREFETCH
- help
-- Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
-+ Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
-
- config CPU_XLR
- bool "Netlogic XLR SoC"
-@@ -1495,7 +1495,7 @@ config CPU_LOONGSON1
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_HIGHMEM
-
--config CPU_BMIPS3300
-+config CPU_BMIPS32_3300
- bool
-
- config CPU_BMIPS4350
-@@ -1589,7 +1589,7 @@ config SYS_HAS_CPU_CAVIUM_OCTEON
- config SYS_HAS_CPU_BMIPS
- bool
-
--config SYS_HAS_CPU_BMIPS3300
-+config SYS_HAS_CPU_BMIPS32_3300
- bool
- select SYS_HAS_CPU_BMIPS
-
+++ /dev/null
-From 0b135a3e8f344061ed0aa66e2514627dd7aa946f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 23 Jun 2013 14:04:51 +0200
-Subject: [PATCH V2 08/13] MIPS: BMIPS: add a smp ops registration helper
-
-Add a helper similar to the generic register_XXX_smp_ops() for bmips.
-Register SMP UP ops in case of BMIPS32/3300.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
-V1 -> V2:
- * use SMP_UP (ops) in case of BMIPS32_3300
-
- arch/mips/Kconfig | 1 +
- arch/mips/bcm63xx/prom.c | 2 +-
- arch/mips/include/asm/bmips.h | 26 ++++++++++++++++++++++++++
- 3 files changed, 28 insertions(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -1496,6 +1496,7 @@ config CPU_LOONGSON1
- select CPU_SUPPORTS_HIGHMEM
-
- config CPU_BMIPS32_3300
-+ select SMP_UP if SMP
- bool
-
- config CPU_BMIPS4350
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -61,7 +61,7 @@ void __init prom_init(void)
-
- if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
- /* set up SMP */
-- register_smp_ops(&bmips43xx_smp_ops);
-+ register_bmips_smp_ops();
-
- /*
- * BCM6328 might not have its second CPU enabled, while BCM3368
---- a/arch/mips/include/asm/bmips.h
-+++ b/arch/mips/include/asm/bmips.h
-@@ -46,9 +46,35 @@
-
- #include <linux/cpumask.h>
- #include <asm/r4kcache.h>
-+#include <asm/smp-ops.h>
-
- extern struct plat_smp_ops bmips43xx_smp_ops;
- extern struct plat_smp_ops bmips5000_smp_ops;
-+
-+static inline int register_bmips_smp_ops(void)
-+{
-+#if IS_ENABLED(CONFIG_CPU_BMIPS) && IS_ENABLED(CONFIG_SMP)
-+ switch (current_cpu_type()) {
-+ case CPU_BMIPS32:
-+ case CPU_BMIPS3300:
-+ return register_up_smp_ops();
-+ case CPU_BMIPS4350:
-+ case CPU_BMIPS4380:
-+ register_smp_ops(&bmips43xx_smp_ops);
-+ break;
-+ case CPU_BMIPS5000:
-+ register_smp_ops(&bmips5000_smp_ops);
-+ break;
-+ default:
-+ return -ENODEV;
-+ }
-+
-+ return 0;
-+#else
-+ return -ENODEV;
-+#endif
-+}
-+
- extern char bmips_reset_nmi_vec;
- extern char bmips_reset_nmi_vec_end;
- extern char bmips_smp_movevec;
+++ /dev/null
-From 08181bee8ee375225129d086656c567022becf41 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 28 Jun 2013 00:08:16 +0200
-Subject: [PATCH V2 09/13] MIPS: BCM63XX: always register bmips smp ops
-
-Use the return value for guarding further SMP setup.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/prom.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -59,10 +59,8 @@ void __init prom_init(void)
- /* do low level board init */
- board_prom_init();
-
-- if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
-- /* set up SMP */
-- register_bmips_smp_ops();
--
-+ /* set up SMP */
-+ if (!register_bmips_smp_ops()) {
- /*
- * BCM6328 might not have its second CPU enabled, while BCM3368
- * and BCM6358 need special handling for their shared TLB, so
+++ /dev/null
-From 949b88531a779af4f6456ff43d3de2d4f74e44ee Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 23 Jun 2013 12:25:49 +0200
-Subject: [PATCH V2 10/13] MIPS: BCM63XX: let the individual SoCs select the
- appropriate CPUs
-
-Let each supported chip select the appropirate SYS_HAS_CPU_BMIPS*
-option for its embedded processor, so support will be conditionally
-included.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 1 -
- arch/mips/bcm63xx/Kconfig | 8 ++++++++
- 2 files changed, 8 insertions(+), 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -133,7 +133,6 @@ config BCM63XX
- select DMA_NONCOHERENT
- select IRQ_CPU
- select SYS_HAS_CPU_MIPS32_R1
-- select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_HAS_EARLY_PRINTK
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -3,33 +3,41 @@ menu "CPU support"
-
- config BCM63XX_CPU_3368
- bool "support 3368 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6345
- bool "support 6345 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
-
- config BCM63XX_CPU_6348
- bool "support 6348 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- endmenu
-
+++ /dev/null
-From c515f21d7680015bc94e0c081b73aba5a3d74680 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 17 Oct 2013 13:14:48 +0200
-Subject: [PATCH V2 12/13] MIPS: cpu-type: guard BMIPS variants with
- SYS_HAS_CPU_BMIPS*
-
-BMIPS32 and BMIPS3300 also need to be available for MIPS32R1, as
-bcm47xx might not select BMIPS.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/cpu-type.h | 13 ++++++++++---
- 1 file changed, 10 insertions(+), 3 deletions(-)
-
---- a/arch/mips/include/asm/cpu-type.h
-+++ b/arch/mips/include/asm/cpu-type.h
-@@ -27,10 +27,7 @@ static inline int __pure __get_cpu_type(
- #ifdef CONFIG_SYS_HAS_CPU_MIPS32_R1
- case CPU_4KC:
- case CPU_ALCHEMY:
-- case CPU_BMIPS3300:
-- case CPU_BMIPS4350:
- case CPU_PR4450:
-- case CPU_BMIPS32:
- case CPU_JZRISC:
- #endif
-
-@@ -163,6 +160,16 @@ static inline int __pure __get_cpu_type(
- case CPU_CAVIUM_OCTEON2:
- #endif
-
-+#if defined(CONFIG_SYS_HAS_CPU_BMIPS32_3300) || \
-+ defined (CONFIG_SYS_HAS_CPU_MIPS32_R1)
-+ case CPU_BMIPS32:
-+ case CPU_BMIPS3300:
-+#endif
-+
-+#ifdef CONFIG_SYS_HAS_CPU_BMIPS4350
-+ case CPU_BMIPS4350:
-+#endif
-+
- #ifdef CONFIG_SYS_HAS_CPU_BMIPS4380
- case CPU_BMIPS4380:
- #endif
+++ /dev/null
-From c6c4897703d825c9efea6d9a708aaa080c8c3177 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 17 Oct 2013 13:16:08 +0200
-Subject: [PATCH V2 13/13] MIPS: BCM63XX: drop SYS_HAS_CPU_MIPS32R1
-
-All MIPS cores on BCM63XX identify as Broadcom, not MIPS, so no need
-to support non-broadcom MIPS CPUs. This also ensures that CPU_BMIPS
-is always selected.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -132,7 +132,6 @@ config BCM63XX
- select CSRC_R4K
- select DMA_NONCOHERENT
- select IRQ_CPU
-- select SYS_HAS_CPU_MIPS32_R1
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_HAS_EARLY_PRINTK
+++ /dev/null
-From a864a5b3efe9dce1647172d105559a1b850cf4c9 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Tue, 14 Jan 2014 15:29:25 -0800
-Subject: [PATCH] usb: gadget: bcm63xx_udc: fix build failure on DMA channel
- code
-
-Commit 3dc6475 ("bcm63xx_enet: add support Broadcom BCM6345 Ethernet")
-changed the ENETDMA[CS] macros such that they are no longer macros, but
-actual register offset definitions. The bcm63xx_udc driver was not
-updated, and as a result, causes the following build error to pop up:
-
- CC drivers/usb/gadget/u_ether.o
-drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_write':
-drivers/usb/gadget/bcm63xx_udc.c:642:24: error: called object '0' is not
-a function
-drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_reset_channel':
-drivers/usb/gadget/bcm63xx_udc.c:698:46: error: called object '0' is not
-a function
-drivers/usb/gadget/bcm63xx_udc.c:700:49: error: called object '0' is not
-a function
-
-Fix this by updating usb_dmac_{read,write}l and usb_dmas_{read,write}l to
-take an extra channel argument, and use the channel width
-(ENETDMA_CHAN_WIDTH) to offset the register we want to access, hence
-doing again what the macro implicitely did for us.
-
-CC: Kevin Cernekee <cernekee@gmail.com>
-CC: Jonas Gorski <jogo@openwrt.org>
-CC: stable@vger.kernel.org
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
-Felipe,
-
-This is against your branch as balbi/usb.git, and this fix should be applied to
-stable 3.11 onwards.
-
-Thanks!
-
- drivers/usb/gadget/bcm63xx_udc.c | 58 ++++++++++++++++++++++------------------
- 1 file changed, 32 insertions(+), 26 deletions(-)
-
---- a/drivers/usb/gadget/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/bcm63xx_udc.c
-@@ -362,24 +362,30 @@ static inline void usb_dma_writel(struct
- bcm_writel(val, udc->iudma_regs + off);
- }
-
--static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off)
-+static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off, int chan)
- {
-- return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
-+ return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
-+ (ENETDMA_CHAN_WIDTH * chan));
- }
-
--static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
-+static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
-+ int chan)
- {
-- bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
-+ bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
-+ (ENETDMA_CHAN_WIDTH * chan));
- }
-
--static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off)
-+static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off, int chan)
- {
-- return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
-+ return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
-+ (ENETDMA_CHAN_WIDTH * chan));
- }
-
--static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
-+static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
-+ int chan)
- {
-- bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
-+ bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
-+ (ENETDMA_CHAN_WIDTH * chan));
- }
-
- static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled)
-@@ -639,7 +645,7 @@ static void iudma_write(struct bcm63xx_u
- } while (!last_bd);
-
- usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK,
-- ENETDMAC_CHANCFG_REG(iudma->ch_idx));
-+ ENETDMAC_CHANCFG_REG, iudma->ch_idx);
- }
-
- /**
-@@ -695,9 +701,9 @@ static void iudma_reset_channel(struct b
- bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num));
-
- /* stop DMA, then wait for the hardware to wrap up */
-- usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG(ch_idx));
-+ usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG, ch_idx);
-
-- while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)) &
-+ while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx) &
- ENETDMAC_CHANCFG_EN_MASK) {
- udelay(1);
-
-@@ -714,10 +720,10 @@ static void iudma_reset_channel(struct b
- dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n",
- ch_idx);
- usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK,
-- ENETDMAC_CHANCFG_REG(ch_idx));
-+ ENETDMAC_CHANCFG_REG, ch_idx);
- }
- }
-- usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG(ch_idx));
-+ usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG, ch_idx);
-
- /* don't leave "live" HW-owned entries for the next guy to step on */
- for (d = iudma->bd_ring; d <= iudma->end_bd; d++)
-@@ -729,11 +735,11 @@ static void iudma_reset_channel(struct b
-
- /* set up IRQs, UBUS burst size, and BD base for this channel */
- usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
-- ENETDMAC_IRMASK_REG(ch_idx));
-- usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG(ch_idx));
-+ ENETDMAC_IRMASK_REG, ch_idx);
-+ usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG, ch_idx);
-
-- usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG(ch_idx));
-- usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG(ch_idx));
-+ usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG, ch_idx);
-+ usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG, ch_idx);
- }
-
- /**
-@@ -2016,7 +2022,7 @@ static irqreturn_t bcm63xx_udc_data_isr(
- spin_lock(&udc->lock);
-
- usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
-- ENETDMAC_IR_REG(iudma->ch_idx));
-+ ENETDMAC_IR_REG, iudma->ch_idx);
- bep = iudma->bep;
- rc = iudma_read(udc, iudma);
-
-@@ -2156,18 +2162,18 @@ static int bcm63xx_iudma_dbg_show(struct
- seq_printf(s, " [ep%d]:\n",
- max_t(int, iudma_defaults[ch_idx].ep_num, 0));
- seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n",
-- usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)),
-- usb_dmac_readl(udc, ENETDMAC_IR_REG(ch_idx)),
-- usb_dmac_readl(udc, ENETDMAC_IRMASK_REG(ch_idx)),
-- usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG(ch_idx)));
-+ usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx),
-+ usb_dmac_readl(udc, ENETDMAC_IR_REG, ch_idx),
-+ usb_dmac_readl(udc, ENETDMAC_IRMASK_REG, ch_idx),
-+ usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG, ch_idx));
-
-- sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG(ch_idx));
-- sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG(ch_idx));
-+ sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG, ch_idx);
-+ sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG, ch_idx);
- seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n",
-- usb_dmas_readl(udc, ENETDMAS_RSTART_REG(ch_idx)),
-+ usb_dmas_readl(udc, ENETDMAS_RSTART_REG, ch_idx),
- sram2 >> 16, sram2 & 0xffff,
- sram3 >> 16, sram3 & 0xffff,
-- usb_dmas_readl(udc, ENETDMAS_SRAM4_REG(ch_idx)));
-+ usb_dmas_readl(udc, ENETDMAS_SRAM4_REG, ch_idx));
- seq_printf(s, " desc: %d/%d used", iudma->n_bds_used,
- iudma->n_bds);
-
static struct clk clk_usbd = {
--- a/drivers/usb/gadget/bcm63xx_udc.c
+++ b/drivers/usb/gadget/bcm63xx_udc.c
-@@ -386,7 +386,6 @@ static inline void set_clocks(struct bcm
+@@ -391,7 +391,6 @@ static inline void set_clocks(struct bcm
if (is_enabled) {
clk_enable(udc->usbh_clk);
clk_enable(udc->usbd_clk);
+#endif /* BCM63XX_USB_PRIV_H_ */
--- a/drivers/usb/gadget/bcm63xx_udc.c
+++ b/drivers/usb/gadget/bcm63xx_udc.c
-@@ -41,6 +41,7 @@
+@@ -40,6 +40,7 @@
#include <bcm63xx_dev_usb_usbd.h>
#include <bcm63xx_io.h>
#include <bcm63xx_regs.h>
#define DRV_MODULE_NAME "bcm63xx_udc"
-@@ -863,22 +864,7 @@ static void bcm63xx_select_phy_mode(stru
+@@ -868,22 +869,7 @@ static void bcm63xx_select_phy_mode(stru
bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
}
}
/**
-@@ -892,14 +878,9 @@ static void bcm63xx_select_phy_mode(stru
+@@ -897,14 +883,9 @@ static void bcm63xx_select_phy_mode(stru
*/
static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
{
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -1124,7 +1124,8 @@ static int m25p_probe(struct spi_device
+@@ -1313,7 +1313,8 @@ static int m25p_probe(struct spi_device
/* partitions should match sector boundaries; and it may be good to
* use readonly partitions for writeprotected sectors (BP2..BP0).
*/
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -101,6 +101,7 @@ struct m25p {
+@@ -115,6 +115,7 @@ struct m25p {
u8 program_opcode;
u8 *command;
- bool fast_read;
+ enum read_type flash_read;
+ int max_transfer_len;
};
static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
-@@ -359,10 +360,9 @@ static int m25p80_erase(struct mtd_info
+@@ -509,10 +510,9 @@ static inline unsigned int m25p80_rx_nbi
* Read an address range from the flash chip. The address range
* may be any size provided it is within the physical boundaries.
*/
struct spi_transfer t[2];
struct spi_message m;
uint8_t opcode;
-@@ -405,6 +405,28 @@ static int m25p80_read(struct mtd_info *
+@@ -562,6 +562,28 @@ static int m25p80_read(struct mtd_info *
return 0;
}
/*
* Write an address range to the flash chip. Data must be written in
* FLASH_PAGESIZE chunks. The address range may be any size provided
-@@ -1001,6 +1023,9 @@ static int m25p_probe(struct spi_device
+@@ -1158,6 +1180,9 @@ static int m25p_probe(struct spi_device
if (!flash->command)
return -ENOMEM;
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
-@@ -650,7 +650,7 @@ static inline u32 hc32_to_cpup (const st
+@@ -639,7 +639,7 @@ static inline u32 hc32_to_cpup (const st
* some big-endian SOC implementations. Same thing happens with PSW access.
*/
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
-@@ -661,6 +661,10 @@ int ehci_setup(struct usb_hcd *hcd)
+@@ -660,6 +660,10 @@ int ehci_setup(struct usb_hcd *hcd)
/* cache this readonly data; minimize chip reads */
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
u8 bcm63xx_get_cpu_rev(void)
{
return bcm63xx_cpu_rev;
-@@ -332,6 +341,7 @@ void __init bcm63xx_cpu_init(void)
+@@ -334,6 +343,7 @@ void __init bcm63xx_cpu_init(void)
/* read out CPU type */
tmp = bcm_readl(chipid_reg);
bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
-@@ -304,6 +304,7 @@ void __init bcm63xx_cpu_init(void)
+@@ -306,6 +306,7 @@ void __init bcm63xx_cpu_init(void)
struct cpuinfo_mips *c = ¤t_cpu_data;
unsigned int cpu = smp_processor_id();
u32 chipid_reg;
/* soc registers location depends on cpu type */
chipid_reg = 0;
-@@ -343,6 +344,7 @@ void __init bcm63xx_cpu_init(void)
+@@ -345,6 +346,7 @@ void __init bcm63xx_cpu_init(void)
bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
bcm63xx_cpu_variant = bcm63xx_cpu_id;
bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
switch (bcm63xx_cpu_id) {
case BCM3368_CPU_ID:
-@@ -352,6 +354,14 @@ void __init bcm63xx_cpu_init(void)
+@@ -354,6 +356,14 @@ void __init bcm63xx_cpu_init(void)
case BCM6328_CPU_ID:
bcm63xx_regs_base = bcm6328_regs_base;
bcm63xx_irqs = bcm6328_irqs;
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
-@@ -382,6 +382,14 @@ void __init bcm63xx_cpu_init(void)
+@@ -384,6 +384,14 @@ void __init bcm63xx_cpu_init(void)
case BCM6362_CPU_ID:
bcm63xx_regs_base = bcm6362_regs_base;
bcm63xx_irqs = bcm6362_irqs;
--- a/arch/mips/bcm63xx/cpu.c
+++ b/arch/mips/bcm63xx/cpu.c
-@@ -392,8 +392,12 @@ void __init bcm63xx_cpu_init(void)
+@@ -394,8 +394,12 @@ void __init bcm63xx_cpu_init(void)
break;
case BCM6368_CPU_ID:
EXPORT_SYMBOL(bcm63xx_cpu_id);
static u32 bcm63xx_cpu_variant __read_mostly;
+@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
+
+ static unsigned int detect_cpu_clock(void)
+ {
+- u16 cpu_id = bcm63xx_get_cpu_id();
++ u32 cpu_id = bcm63xx_get_cpu_id();
+
+ switch (cpu_id) {
+ case BCM3368_CPU_ID:
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void);
u32 bcm63xx_get_cpu_variant(void)
{
return bcm63xx_cpu_variant;
-@@ -251,6 +260,27 @@ static unsigned int detect_cpu_clock(voi
+@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
}
+ }
default:
- BUG();
-@@ -265,7 +295,7 @@ static unsigned int detect_memory_size(v
+ panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
+@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
u32 val;
return bcm_ddr_readl(DDR_CSEND_REG) << 24;
if (BCMCPU_IS_6345()) {
-@@ -304,6 +334,7 @@ void __init bcm63xx_cpu_init(void)
+@@ -306,6 +336,7 @@ void __init bcm63xx_cpu_init(void)
struct cpuinfo_mips *c = ¤t_cpu_data;
unsigned int cpu = smp_processor_id();
u32 chipid_reg;
u8 __maybe_unused varid = 0;
/* soc registers location depends on cpu type */
-@@ -325,6 +356,9 @@ void __init bcm63xx_cpu_init(void)
+@@ -327,6 +358,9 @@ void __init bcm63xx_cpu_init(void)
case 0x10:
chipid_reg = BCM_6345_PERF_BASE;
break;
default:
chipid_reg = BCM_6368_PERF_BASE;
break;
-@@ -332,6 +366,7 @@ void __init bcm63xx_cpu_init(void)
+@@ -334,6 +368,7 @@ void __init bcm63xx_cpu_init(void)
break;
}
/*
* really early to panic, but delaying panic would not help since we
* will never get any working console
-@@ -341,10 +376,17 @@ void __init bcm63xx_cpu_init(void)
+@@ -343,10 +378,17 @@ void __init bcm63xx_cpu_init(void)
/* read out CPU type */
tmp = bcm_readl(chipid_reg);
switch (bcm63xx_cpu_id) {
case BCM3368_CPU_ID:
-@@ -399,6 +441,15 @@ void __init bcm63xx_cpu_init(void)
+@@ -401,6 +443,15 @@ void __init bcm63xx_cpu_init(void)
/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
bcm63xx_cpu_id = BCM6368_CPU_ID;
break;
/* MIPS PLL control register */
#define PERF_MIPSPLLCTL_REG 0x34
#define MIPSPLLCTL_N1_SHIFT 20
-@@ -1499,6 +1571,13 @@
+@@ -1379,6 +1451,13 @@
#define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
#define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
static const unsigned long bcm6328_regs_base[] = {
__GEN_CPU_REGS_TABLE(6328)
};
-@@ -134,12 +142,38 @@ unsigned int bcm63xx_get_memory_size(voi
+@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
return bcm63xx_memory_size;
}
+
static unsigned int detect_cpu_clock(void)
{
- switch (bcm63xx_get_cpu_id()) {
+ u32 cpu_id = bcm63xx_get_cpu_id();
+@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
case BCM3368_CPU_ID:
return 300000000;
case BCM6328_CPU_ID:
{
unsigned int tmp, mips_pll_fcvo;
-@@ -295,6 +329,13 @@ static unsigned int detect_memory_size(v
+@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
u32 val;
if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-@@ -342,6 +383,12 @@ void __init bcm63xx_cpu_init(void)
+@@ -344,6 +385,12 @@ void __init bcm63xx_cpu_init(void)
switch (c->cputype) {
case CPU_BMIPS3300:
if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
__cpu_name[cpu] = "Broadcom BCM6338";
/* fall-through */
-@@ -389,6 +436,10 @@ void __init bcm63xx_cpu_init(void)
+@@ -391,6 +438,10 @@ void __init bcm63xx_cpu_init(void)
bcm63xx_cpu_variant = bcm63xx_cpu_id;
switch (bcm63xx_cpu_id) {
#define TIMER_CTL0_REG 0x4
#define TIMER_CTL1_REG 0x8
#define TIMER_CTL2_REG 0xC
-@@ -1372,6 +1444,8 @@
+@@ -1252,6 +1324,8 @@
#define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
#define SDRAM_CFG_BANK_SHIFT 13
#define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1662,6 +1662,17 @@
+@@ -1542,6 +1542,17 @@
* _REG relative to RSET_PCIE
*************************************************************************/
#define PCIE_CONFIG2_REG 0x408
#define CONFIG2_BAR1_SIZE_EN 1
#define CONFIG2_BAR1_SIZE_MASK 0xf
-@@ -1707,7 +1718,54 @@
+@@ -1587,7 +1598,54 @@
#define PCIE_RC_INT_C (1 << 2)
#define PCIE_RC_INT_D (1 << 3)
* _REG relative to RSET_OTP
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -489,8 +489,12 @@ static int bcm63xx_pcie_read(struct pci_
+@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
if (!bcm63xx_pcie_can_access(bus, devfn))
return PCIBIOS_DEVICE_NOT_FOUND;
data = bcm_pcie_readl(reg);
-@@ -509,8 +513,12 @@ static int bcm63xx_pcie_write(struct pci
+@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
if (!bcm63xx_pcie_can_access(bus, devfn))
return PCIBIOS_DEVICE_NOT_FOUND;
spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -800,6 +800,12 @@
+@@ -680,6 +680,12 @@
#define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
#define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
#define GPIO_PINMUX_OTHR_REG 0x24
#define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
-@@ -1118,6 +1124,7 @@
+@@ -998,6 +1004,7 @@
#define USBH_PRIV_SWAP_6358_REG 0x0
#define USBH_PRIV_SWAP_6368_REG 0x1c
#define USBH_PRIV_SWAP_USBD_SHIFT 6
#define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
-@@ -1143,6 +1150,13 @@
+@@ -1023,6 +1030,13 @@
#define USBH_PRIV_SETUP_IOC_SHIFT 4
#define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
/*************************************************************************
* _REG relative to RSET_WDT
-@@ -1666,6 +1669,11 @@
+@@ -1546,6 +1549,11 @@
#define STRAPBUS_63268_FCVO_SHIFT 21
#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1152,11 +1152,18 @@
+@@ -1032,11 +1032,18 @@
#define USBH_PRIV_SETUP_6368_REG 0x28
#define USBH_PRIV_SETUP_IOC_SHIFT 4
#define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
bcm_gpio_writel(val, GPIO_MODE_REG);
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -770,6 +770,8 @@
+@@ -650,6 +650,8 @@
#define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
#define GPIO_MODE_6358_SERIAL_LED (1 << 10)
#define GPIO_MODE_6358_UTOPIA (1 << 12)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1086,6 +1086,19 @@
+@@ -966,6 +966,19 @@
#define ENETSW_PORTOV_FDX_MASK (1 << 1)
#define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
return -ENODEV;
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -827,6 +827,7 @@
+@@ -707,6 +707,7 @@
#define GPIO_STRAPBUS_REG 0x40
#define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
#define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
#define STRAPBUS_6368_BOOT_SEL_MASK 0x3
#define STRAPBUS_6368_BOOT_SEL_NAND 0
#define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1697,6 +1698,7 @@
+@@ -1577,6 +1578,7 @@
#define IDDQ_CTRL_63268_USBH (1 << 4)
#define MISC_STRAPBUS_6328_REG 0x240
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
-@@ -992,6 +992,9 @@ static int m25p_probe(struct spi_device
+@@ -1149,6 +1149,9 @@ static int m25p_probe(struct spi_device
dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
}
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -15,6 +15,8 @@
+@@ -15,6 +15,10 @@
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
++#if 0 /* FIXME: 3.14 removed non-DT support */
+#include <linux/spi/74x164.h>
++#endif
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
-@@ -49,6 +51,12 @@
+@@ -49,6 +53,12 @@
#define CFE_OFFSET_64K 0x10000
#define CFE_OFFSET_128K 0x20000
static struct board_info board;
/*
-@@ -755,6 +763,601 @@ static struct board_info __initdata boar
+@@ -755,6 +765,605 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
+ &nb4_spi_gpio,
+};
+
++#if 0 /* FIXME: 3.14 removed non-DT support */
+const struct gen_74x164_chip_platform_data nb4_74x164_platform_data = {
+ .base = NB4_74X164_GPIO_BASE
+};
++#endif
+
+static struct spi_board_info nb4_spi_devices[] = {
++#if 0 /* FIXME: 3.14 removed non-DT support */
+ {
+ .modalias = "74x164",
+ .max_speed_hz = 781000,
+ .mode = SPI_MODE_0,
+ .platform_data = &nb4_74x164_platform_data
+ }
++#endif
+};
+
+static struct board_info __initdata board_nb4_ser_r0 = {
#endif
/*
-@@ -791,6 +1394,11 @@ static const struct board_info __initcon
+@@ -791,6 +1400,11 @@ static const struct board_info __initcon
&board_96358vw2,
&board_AGPFS0,
&board_DWVS0,
#endif
};
-@@ -845,6 +1453,16 @@ static void __init boardid_fixup(u8 *boo
+@@ -845,6 +1459,16 @@ static void __init boardid_fixup(u8 *boo
struct bcm_tag *tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_64K);
char *board_name = (char *)bcm63xx_nvram_get_name();
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -226,6 +226,40 @@ static struct board_info __initdata boar
+@@ -228,6 +228,40 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1373,6 +1407,7 @@ static const struct board_info __initcon
+@@ -1379,6 +1413,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6338
&board_96338gw,
&board_96338w,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -754,6 +754,98 @@ static struct board_info __initdata boar
+@@ -756,6 +756,98 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_AGPFS0 = {
.name = "AGPF-S0",
.expected_cpu_id = 0x6358,
-@@ -1428,6 +1520,7 @@ static const struct board_info __initcon
+@@ -1434,6 +1526,7 @@ static const struct board_info __initcon
&board_96358vw,
&board_96358vw2,
&board_AGPFS0,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -890,6 +890,61 @@ static struct board_info __initdata boar
+@@ -892,6 +892,61 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
};
struct spi_gpio_platform_data nb4_spi_gpio_data = {
.sck = NB4_SPI_GPIO_CLK,
.mosi = NB4_SPI_GPIO_MOSI,
-@@ -1522,6 +1577,7 @@ static const struct board_info __initcon
+@@ -1528,6 +1583,7 @@ static const struct board_info __initcon
&board_AGPFS0,
&board_CPVA642,
&board_DWVS0,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -647,6 +647,67 @@ static struct board_info __initdata boar
+@@ -649,6 +649,67 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1569,6 +1630,7 @@ static const struct board_info __initcon
+@@ -1575,6 +1636,7 @@ static const struct board_info __initcon
&board_96348gw_a,
&board_rta1025w_16,
&board_96348_D4PW,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -514,6 +514,112 @@ static struct board_info __initdata boar
+@@ -516,6 +516,112 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_FAST2404 = {
.name = "F@ST2404",
.expected_cpu_id = 0x6348,
-@@ -1623,6 +1729,8 @@ static const struct board_info __initcon
+@@ -1629,6 +1735,8 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6348
&board_96348r,
&board_96348gw,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -814,6 +814,78 @@ static struct board_info __initdata boar
+@@ -816,6 +816,78 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1739,6 +1811,7 @@ static const struct board_info __initcon
+@@ -1745,6 +1817,7 @@ static const struct board_info __initcon
&board_rta1025w_16,
&board_96348_D4PW,
&board_spw500v,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1778,6 +1778,83 @@ static struct board_info __initdata boar
+@@ -1784,6 +1784,83 @@ static struct board_info __initdata boar
.spis = nb4_spi_devices,
.num_spis = ARRAY_SIZE(nb4_spi_devices),
};
#endif
/*
-@@ -1826,6 +1903,7 @@ static const struct board_info __initcon
+@@ -1832,6 +1909,7 @@ static const struct board_info __initcon
&board_nb4_ser_r2,
&board_nb4_fxc_r1,
&board_nb4_fxc_r2,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -260,6 +260,45 @@ static struct board_info __initdata boar
+@@ -262,6 +262,45 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1871,6 +1910,7 @@ static const struct board_info __initcon
+@@ -1877,6 +1916,7 @@ static const struct board_info __initcon
&board_96338gw,
&board_96338w,
&board_96338w2_e7t,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1894,6 +1894,72 @@ static struct board_info __initdata boar
+@@ -1900,6 +1900,72 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1944,6 +2010,7 @@ static const struct board_info __initcon
+@@ -1950,6 +2016,7 @@ static const struct board_info __initcon
&board_nb4_fxc_r1,
&board_nb4_fxc_r2,
&board_HW553,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -925,6 +925,65 @@ static struct board_info __initdata boar
+@@ -927,6 +927,65 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -1995,6 +2054,7 @@ static const struct board_info __initcon
+@@ -2001,6 +2060,7 @@ static const struct board_info __initcon
&board_96348_D4PW,
&board_spw500v,
&board_96348sv,
#endif
#ifdef CONFIG_BCM63XX_CPU_6358
-@@ -2116,6 +2176,22 @@ void __init board_prom_init(void)
+@@ -2122,6 +2182,22 @@ void __init board_prom_init(void)
val &= MPI_CSBASE_BASE_MASK;
}
boot_addr = (u8 *)KSEG1ADDR(val);
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -485,6 +485,64 @@ static struct board_info __initdata boar
+@@ -487,6 +487,64 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
-@@ -2055,6 +2113,7 @@ static const struct board_info __initcon
+@@ -2061,6 +2119,7 @@ static const struct board_info __initcon
&board_spw500v,
&board_96348sv,
&board_V2500V_BB,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -543,6 +543,51 @@ static struct board_info __initdata boar
+@@ -545,6 +545,51 @@ static struct board_info __initdata boar
};
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
-@@ -2114,6 +2159,7 @@ static const struct board_info __initcon
+@@ -2120,6 +2165,7 @@ static const struct board_info __initcon
&board_96348sv,
&board_V2500V_BB,
&board_V2110,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1313,6 +1313,8 @@ static struct board_info __initdata boar
+@@ -1315,6 +1315,8 @@ static struct board_info __initdata boar
.name = "DWV-S0",
.expected_cpu_id = 0x6358,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
-@@ -1328,6 +1330,7 @@ static struct board_info __initdata boar
+@@ -1330,6 +1332,7 @@ static struct board_info __initdata boar
},
.has_ohci0 = 1,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -588,6 +588,69 @@ static struct board_info __initdata boar
+@@ -590,6 +590,69 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
-@@ -2163,6 +2226,7 @@ static const struct board_info __initcon
+@@ -2169,6 +2232,7 @@ static const struct board_info __initcon
&board_V2500V_BB,
&board_V2110,
&board_ct536_ct5621,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -853,6 +853,7 @@ static struct board_info __initdata boar
+@@ -855,6 +855,7 @@ static struct board_info __initdata boar
.name = "RTA1025W_16",
.expected_cpu_id = 0x6348,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1151,6 +1151,46 @@ static struct board_info __initdata boar
+@@ -1153,6 +1153,46 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -2228,6 +2268,7 @@ static const struct board_info __initcon
+@@ -2234,6 +2274,7 @@ static const struct board_info __initcon
&board_V2110,
&board_ct536_ct5621,
&board_96348A_122,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2232,6 +2232,85 @@ static struct board_info __initdata boar
+@@ -2238,6 +2238,85 @@ static struct board_info __initdata boar
#endif
/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -2286,6 +2365,10 @@ static const struct board_info __initcon
+@@ -2292,6 +2371,10 @@ static const struct board_info __initcon
&board_HW553,
&board_spw303v,
#endif
};
/*
-@@ -2467,12 +2550,25 @@ void __init board_prom_init(void)
+@@ -2473,12 +2556,25 @@ void __init board_prom_init(void)
bcm63xx_pci_enabled = 1;
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G2_PCI;
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2308,6 +2308,72 @@ static struct board_info __initdata boar
+@@ -2314,6 +2314,72 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_ehci0 = 1,
};
#endif
/*
-@@ -2368,6 +2434,7 @@ static const struct board_info __initcon
+@@ -2374,6 +2440,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -108,13 +108,45 @@ static struct board_info __initdata boar
+@@ -110,13 +110,45 @@ static struct board_info __initdata boar
.port_no = 0,
},
.name = "96328avng::power",
.gpio = 4,
.active_low = 1,
-@@ -131,7 +163,7 @@ static struct board_info __initdata boar
+@@ -133,7 +165,7 @@ static struct board_info __initdata boar
.active_low = 1,
},
{
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -169,6 +169,76 @@ static struct board_info __initdata boar
+@@ -171,6 +171,76 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -2417,6 +2487,7 @@ static const struct board_info __initcon
+@@ -2423,6 +2493,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -239,6 +239,111 @@ static struct board_info __initdata boar
+@@ -241,6 +241,111 @@ static struct board_info __initdata boar
},
};
#endif
/*
-@@ -2488,6 +2593,7 @@ static const struct board_info __initcon
+@@ -2494,6 +2599,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
&board_963281TAN,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1398,6 +1398,59 @@ static struct board_info __initdata boar
+@@ -1400,6 +1400,59 @@ static struct board_info __initdata boar
},
};
#endif
/*
-@@ -2623,6 +2676,7 @@ static const struct board_info __initcon
+@@ -2629,6 +2682,7 @@ static const struct board_info __initcon
&board_ct536_ct5621,
&board_96348A_122,
&board_CPVA502plus,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -57,6 +57,13 @@
+@@ -59,6 +59,13 @@
#define NB4_SPI_GPIO_CLK 6
#define NB4_74HC64_GPIO(X) (NB4_74X164_GPIO_BASE + (X))
static struct board_info board;
/*
-@@ -2347,6 +2354,113 @@ static struct board_info __initdata boar
+@@ -2353,6 +2360,117 @@ static struct board_info __initdata boar
.num_spis = ARRAY_SIZE(nb4_spi_devices),
};
+ &ct6373_spi_gpio,
+};
+
++#if 0 /* FIXME: 3.14 dropped non-DT support */
+const struct gen_74x164_chip_platform_data ct6373_74x164_platform_data = {
+ .base = CT6373_74X164_GPIO_BASE
+};
++#endif
+
+static struct spi_board_info ct6373_spi_devices[] = {
++#if 0 /* FIXME: 3.14 dropped non-DT support */
+ {
+ .modalias = "74x164",
+ .max_speed_hz = 781000,
+ .mode = SPI_MODE_0,
+ .platform_data = &ct6373_74x164_platform_data
+ }
++#endif
+};
+
+static struct board_info __initdata board_ct6373_1 = {
static struct board_info __initdata board_HW553 = {
.name = "HW553",
.expected_cpu_id = 0x6358,
-@@ -2691,6 +2805,7 @@ static const struct board_info __initcon
+@@ -2697,6 +2815,7 @@ static const struct board_info __initcon
&board_nb4_ser_r2,
&board_nb4_fxc_r1,
&board_nb4_fxc_r2,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2603,6 +2603,73 @@ static struct board_info __initdata boar
+@@ -2613,6 +2613,73 @@ static struct board_info __initdata boar
},
}
};
#endif
/*
-@@ -2808,6 +2875,7 @@ static const struct board_info __initcon
+@@ -2818,6 +2885,7 @@ static const struct board_info __initcon
&board_ct6373_1,
&board_HW553,
&board_spw303v,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -17,6 +17,7 @@
- #include <linux/spi/spi.h>
- #include <linux/spi/spi_gpio.h>
+@@ -19,6 +19,7 @@
+ #if 0 /* FIXME: 3.14 removed non-DT support */
#include <linux/spi/74x164.h>
+ #endif
+#include <linux/rtl8367.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
-@@ -56,6 +57,8 @@
+@@ -58,6 +59,8 @@
#define NB4_SPI_GPIO_MOSI 7
#define NB4_SPI_GPIO_CLK 6
#define NB4_74HC64_GPIO(X) (NB4_74X164_GPIO_BASE + (X))
#define CT6373_PID_OFFSET 0xff80
#define CT6373_74X164_GPIO_BASE 64
-@@ -2672,6 +2675,104 @@ static struct board_info __initdata boar
+@@ -2682,6 +2685,104 @@ static struct board_info __initdata boar
};
#endif
/*
* known 6368 boards
*/
-@@ -2878,6 +2979,10 @@ static const struct board_info __initcon
+@@ -2888,6 +2989,10 @@ static const struct board_info __initcon
&board_DVAG3810BN,
#endif
#ifdef CONFIG_BCM63XX_CPU_6368
&board_96368mvwg,
&board_96368mvngr,
-@@ -2945,6 +3050,11 @@ static void __init boardid_fixup(u8 *boo
+@@ -2955,6 +3060,11 @@ static void __init boardid_fixup(u8 *boo
}
}
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1066,6 +1066,57 @@ static struct board_info __initdata boar
+@@ -1068,6 +1068,57 @@ static struct board_info __initdata boar
.has_ehci0 = 1,
};
static struct board_info __initdata board_rta1025w_16 = {
.name = "RTA1025W_16",
.expected_cpu_id = 0x6348,
-@@ -2947,6 +2998,7 @@ static const struct board_info __initcon
+@@ -2957,6 +3008,7 @@ static const struct board_info __initcon
&board_96348gw_10,
&board_96348gw_11,
&board_FAST2404,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -250,6 +250,126 @@ static struct board_info __initdata boar
+@@ -252,6 +252,126 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_dsl_274xb_f1 = {
.name = "AW4339U",
.expected_cpu_id = 0x6328,
-@@ -2979,6 +3099,7 @@ static const struct board_info __initcon
+@@ -2989,6 +3109,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
&board_963281TAN,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -180,6 +180,79 @@ static struct board_info __initdata boar
+@@ -182,6 +182,79 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_963281TAN = {
.name = "963281TAN",
.expected_cpu_id = 0x6328,
-@@ -3098,6 +3171,7 @@ static const struct board_info __initcon
+@@ -3108,6 +3181,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -180,6 +180,73 @@ static struct board_info __initdata boar
+@@ -182,6 +182,73 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_96328A_1441N1 = {
.name = "96328A-1441N1",
.expected_cpu_id = 0x6328,
-@@ -3171,6 +3238,7 @@ static const struct board_info __initcon
+@@ -3181,6 +3248,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_6328
&board_96328avng,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -788,6 +788,55 @@ static struct board_info __initdata boar
+@@ -790,6 +790,55 @@ static struct board_info __initdata boar
.has_uart0 = 1,
};
#endif
/*
-@@ -3252,6 +3301,7 @@ static const struct board_info __initcon
+@@ -3262,6 +3311,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_6345
&board_96345gw2,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2901,6 +2901,492 @@ static struct board_info __initdata boar
+@@ -2911,6 +2911,492 @@ static struct board_info __initdata boar
},
};
/* T-Home Speedport W 303V Typ B */
static struct board_info __initdata board_spw303v = {
.name = "96358-502V",
-@@ -3340,6 +3826,10 @@ static const struct board_info __initcon
+@@ -3350,6 +3836,10 @@ static const struct board_info __initcon
&board_nb4_fxc_r2,
&board_ct6373_1,
&board_HW553,
&board_spw303v,
&board_DVAG3810BN,
#endif
-@@ -3405,13 +3895,37 @@ static void __init boardid_fixup(u8 *boo
+@@ -3415,13 +3905,37 @@ static void __init boardid_fixup(u8 *boo
struct bcm_tag *tag = (struct bcm_tag *)(boot_addr + CFE_OFFSET_64K);
char *board_name = (char *)bcm63xx_nvram_get_name();
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -776,6 +776,60 @@ static struct board_info __initdata boar
+@@ -778,6 +778,60 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -3788,6 +3842,7 @@ static const struct board_info __initcon
+@@ -3798,6 +3852,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6345
&board_96345gw2,
&board_rta770bw,
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1480,6 +1480,122 @@ static struct board_info __initdata boar
+@@ -1482,6 +1482,122 @@ static struct board_info __initdata boar
},
};
static struct board_info __initdata board_rta1025w_16 = {
.name = "RTA1025W_16",
.expected_cpu_id = 0x6348,
-@@ -3832,6 +3948,7 @@ static const struct board_info __initcon
+@@ -3842,6 +3958,7 @@ static const struct board_info __initcon
&board_963281TAN,
&board_963281T_TEF,
&board_dsl_274xb_f1,
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -3787,6 +3787,96 @@ static struct board_info __initdata boar
+@@ -3797,6 +3797,96 @@ static struct board_info __initdata boar
.devs = nb6_devices,
.num_devs = ARRAY_SIZE(nb6_devices),
};
#endif
/*
-@@ -4008,6 +4098,7 @@ static const struct board_info __initcon
+@@ -4018,6 +4108,7 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_6362
&board_nb6,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2211,6 +2211,99 @@ static struct board_info __initdata boar
+@@ -2213,6 +2213,99 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_ehci0 = 1,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1655,6 +1655,19 @@ static struct board_info __initdata boar
+@@ -1657,6 +1657,19 @@ static struct board_info __initdata boar
},
.has_ohci0 = 1,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -999,6 +999,17 @@ static struct board_info __initdata boar
+@@ -1001,6 +1001,17 @@ static struct board_info __initdata boar
.active_low = 1,
},
},
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -627,6 +627,8 @@ static struct board_info __initdata boar
+@@ -629,6 +629,8 @@ static struct board_info __initdata boar
.has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -670,6 +672,8 @@ static struct board_info __initdata boar
+@@ -672,6 +674,8 @@ static struct board_info __initdata boar
.has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -955,6 +959,8 @@ static struct board_info __initdata boar
+@@ -957,6 +961,8 @@ static struct board_info __initdata boar
.use_internal_phy = 1,
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -1027,6 +1033,8 @@ static struct board_info __initdata boar
+@@ -1029,6 +1035,8 @@ static struct board_info __initdata boar
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -1256,6 +1264,8 @@ static struct board_info __initdata boar
+@@ -1258,6 +1266,8 @@ static struct board_info __initdata boar
.use_internal_phy = 1,
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -1431,6 +1441,8 @@ static struct board_info __initdata boar
+@@ -1433,6 +1443,8 @@ static struct board_info __initdata boar
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -1621,6 +1633,12 @@ static struct board_info __initdata boar
+@@ -1623,6 +1635,12 @@ static struct board_info __initdata boar
.use_internal_phy = 1,
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -2036,6 +2054,8 @@ static struct board_info __initdata boar
+@@ -2038,6 +2056,8 @@ static struct board_info __initdata boar
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -2088,6 +2108,8 @@ static struct board_info __initdata boar
+@@ -2090,6 +2110,8 @@ static struct board_info __initdata boar
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -2229,6 +2251,8 @@ static struct board_info __initdata boar
+@@ -2231,6 +2253,8 @@ static struct board_info __initdata boar
},
.enet1 = {
.force_speed_100 = 1,
.force_duplex_full = 1,
},
-@@ -2346,6 +2370,8 @@ static struct board_info __initdata boar
+@@ -2348,6 +2372,8 @@ static struct board_info __initdata boar
},
.enet1 = {
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2378,6 +2378,94 @@ static struct board_info __initdata boar
+@@ -2380,6 +2380,94 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_ehci0 = 1,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -102,6 +102,93 @@ static struct board_info __initdata boar
+@@ -104,6 +104,93 @@ static struct board_info __initdata boar
#endif
/*
* known 6328 boards
*/
#ifdef CONFIG_BCM63XX_CPU_6328
-@@ -4262,6 +4349,9 @@ static const struct board_info __initcon
+@@ -4272,6 +4359,9 @@ static const struct board_info __initcon
#ifdef CONFIG_BCM63XX_CPU_3368
&board_cvg834g,
#endif
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -186,6 +186,94 @@ static struct board_info __initdata boar
+@@ -188,6 +188,94 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -4351,6 +4439,7 @@ static const struct board_info __initcon
+@@ -4361,6 +4449,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_6318
&board_96318ref,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -4431,6 +4431,75 @@ static struct board_info __initdata boar
+@@ -4441,6 +4441,75 @@ static struct board_info __initdata boar
#endif
/*
* all boards
*/
static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -4515,6 +4584,9 @@ static const struct board_info __initcon
+@@ -4525,6 +4594,9 @@ static const struct board_info __initcon
&board_96368mvwg,
&board_96368mvngr,
#endif
---
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2208,6 +2208,51 @@ static struct board_info __initdata boar
+@@ -2210,6 +2210,51 @@ static struct board_info __initdata boar
},
};
#endif
/*
-@@ -4551,6 +4596,7 @@ static const struct board_info __initcon
+@@ -4561,6 +4606,7 @@ static const struct board_info __initcon
&board_96348A_122,
&board_CPVA502plus,
&board_96348W3,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -4542,6 +4542,108 @@ static struct board_info __initdata boar
+@@ -4552,6 +4552,108 @@ static struct board_info __initdata boar
},
},
};
#endif
/*
-@@ -4632,6 +4734,7 @@ static const struct board_info __initcon
+@@ -4642,6 +4744,7 @@ static const struct board_info __initcon
#endif
#ifdef CONFIG_BCM63XX_CPU_63268
&board_963269bhr,
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -4479,6 +4479,131 @@ static struct board_info __initdata boar
+@@ -4489,6 +4489,131 @@ static struct board_info __initdata boar
* known 63268/63269 boards
*/
#ifdef CONFIG_BCM63XX_CPU_63268
static struct board_info __initdata board_963269bhr = {
.name = "963269BHR",
.expected_cpu_id = 0x63268,
-@@ -4733,6 +4858,7 @@ static const struct board_info __initcon
+@@ -4743,6 +4868,7 @@ static const struct board_info __initcon
&board_96368mvngr,
#endif
#ifdef CONFIG_BCM63XX_CPU_63268
if (nvram.version <= 4) {
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
-@@ -59,6 +59,7 @@ void (*_dma_cache_wback)(unsigned long s
+@@ -58,6 +58,7 @@ void (*_dma_cache_wback)(unsigned long s
void (*_dma_cache_inv)(unsigned long start, unsigned long size);
EXPORT_SYMBOL(_dma_cache_wback_inv);
+#include <linux/export.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_gpio.h>
- #include <linux/spi/74x164.h>
-@@ -4869,7 +4870,7 @@ static const struct board_info __initcon
+ #if 0 /* FIXME: 3.14 removed non-DT support */
+@@ -4879,7 +4880,7 @@ static const struct board_info __initcon
* bcm4318 WLAN work
*/
#ifdef CONFIG_SSB_PCIHOST
.revision = 0x02,
.board_rev = 0x17,
.country_code = 0x0,
-@@ -4889,6 +4890,7 @@ static struct ssb_sprom bcm63xx_sprom =
+@@ -4899,6 +4900,7 @@ static struct ssb_sprom bcm63xx_sprom =
.boardflags_lo = 0x2848,
.boardflags_hi = 0x0000,
};
projects / thirdparty / openwrt.git / commitdiff
