]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
RISC-V: Reconcile the existing test for vremu.vx combine
authorPan Li <pan2.li@intel.com>
Mon, 9 Jun 2025 08:28:50 +0000 (16:28 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 10 Jun 2025 02:06:44 +0000 (10:06 +0800)
Some existing vrem related test need some adjust for the
asm check due to cost model.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Adjust the
asm check for vremu.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c

index ad918a9b800a7ca521c9b47bb549d8f661de2cbd..10de7c268e5e390d64fc712266607e4c9fbdfc8b 100644 (file)
@@ -4,8 +4,8 @@
 
 /* { dg-final { scan-assembler-times {\tvrem\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {\tvrem\.vx} } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vv} 5 } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vx} 3 } } */
+/* { dg-final { scan-assembler-times {\tvremu\.vv} 8 } } */
+/* { dg-final { scan-assembler-not {\tvremu\.vx} } } */
 /* { dg-final { scan-tree-dump-times "\.COND_LEN_MOD" 16 "optimized" } } */
 /* { dg-final { scan-assembler-not {\tvmv1r\.v} } } */
 /* { dg-final { scan-assembler-not {\tvmv2r\.v} } } */
index 4e28f99e28867103731ddb04122a009de2dda528..cf187a2bde7cd19f701b6a614c1c4f39ce50f8b1 100644 (file)
@@ -5,8 +5,8 @@
 
 /* { dg-final { scan-assembler-times {\tvrem\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {\tvrem\.vx} } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vv} 4 } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vx} 4 } } */
+/* { dg-final { scan-assembler-times {\tvremu\.vv} 8 } } */
+/* { dg-final { scan-assembler-not {\tvremu\.vx} } } */
 /* { dg-final { scan-tree-dump-times "\.COND_LEN_MOD" 16 "optimized" } } */
 /* { dg-final { scan-assembler-not {\tvmv1r\.v} } } */
 /* { dg-final { scan-assembler-not {\tvmv2r\.v} } } */