]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
lib/crc: riscv: Migrate optimized CRC code into lib/crc/
authorEric Biggers <ebiggers@kernel.org>
Sat, 7 Jun 2025 20:04:50 +0000 (13:04 -0700)
committerEric Biggers <ebiggers@kernel.org>
Mon, 30 Jun 2025 16:31:57 +0000 (09:31 -0700)
Move the riscv-optimized CRC code from arch/riscv/lib/crc* into its new
location in lib/crc/riscv/, and wire it up in the new way.  This new way
of organizing the CRC code eliminates the need to artificially split the
code for each CRC variant into separate arch and generic modules,
enabling better inlining and dead code elimination.  For more details,
see "lib/crc: Prepare for arch-optimized code in subdirs of lib/crc/".

Reviewed-by: "Martin K. Petersen" <martin.petersen@oracle.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: "Jason A. Donenfeld" <Jason@zx2c4.com>
Link: https://lore.kernel.org/r/20250607200454.73587-9-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
15 files changed:
arch/riscv/Kconfig
arch/riscv/lib/Makefile
lib/crc/Kconfig
lib/crc/Makefile
lib/crc/riscv/crc-clmul-consts.h [moved from arch/riscv/lib/crc-clmul-consts.h with 100% similarity]
lib/crc/riscv/crc-clmul-template.h [moved from arch/riscv/lib/crc-clmul-template.h with 100% similarity]
lib/crc/riscv/crc-clmul.h [moved from arch/riscv/lib/crc-clmul.h with 100% similarity]
lib/crc/riscv/crc-t10dif.h [moved from arch/riscv/lib/crc-t10dif.c with 62% similarity]
lib/crc/riscv/crc16_msb.c [moved from arch/riscv/lib/crc16_msb.c with 100% similarity]
lib/crc/riscv/crc32.h [moved from arch/riscv/lib/crc32.c with 66% similarity]
lib/crc/riscv/crc32_lsb.c [moved from arch/riscv/lib/crc32_lsb.c with 100% similarity]
lib/crc/riscv/crc32_msb.c [moved from arch/riscv/lib/crc32_msb.c with 100% similarity]
lib/crc/riscv/crc64.h [moved from arch/riscv/lib/crc64.c with 65% similarity]
lib/crc/riscv/crc64_lsb.c [moved from arch/riscv/lib/crc64_lsb.c with 100% similarity]
lib/crc/riscv/crc64_msb.c [moved from arch/riscv/lib/crc64_msb.c with 100% similarity]

index 36061f4732b7496a9c68a9a10f9959849dc2a95c..d963d8faf2aeb7dca3bc6ccb00dd021c54d0fe93 100644 (file)
@@ -24,9 +24,6 @@ config RISCV
        select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
        select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
        select ARCH_HAS_BINFMT_FLAT
-       select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
-       select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
-       select ARCH_HAS_CRC_T10DIF if RISCV_ISA_ZBC
        select ARCH_HAS_CURRENT_STACK_POINTER
        select ARCH_HAS_DEBUG_VIRTUAL if MMU
        select ARCH_HAS_DEBUG_VM_PGTABLE
index 0baec92d2f55b8320281bded76442f9a31581622..a4f4b48ed3a47334e546c44a4d9ec692f83cacda 100644 (file)
@@ -16,12 +16,6 @@ endif
 lib-$(CONFIG_MMU)      += uaccess.o
 lib-$(CONFIG_64BIT)    += tishift.o
 lib-$(CONFIG_RISCV_ISA_ZICBOZ) += clear_page.o
-obj-$(CONFIG_CRC32_ARCH)       += crc32-riscv.o
-crc32-riscv-y := crc32.o crc32_msb.o crc32_lsb.o
-obj-$(CONFIG_CRC64_ARCH) += crc64-riscv.o
-crc64-riscv-y := crc64.o crc64_msb.o crc64_lsb.o
-obj-$(CONFIG_CRC_T10DIF_ARCH)  += crc-t10dif-riscv.o
-crc-t10dif-riscv-y := crc-t10dif.o crc16_msb.o
 obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
 lib-$(CONFIG_RISCV_ISA_V)      += xor.o
 lib-$(CONFIG_RISCV_ISA_V)      += riscv_v_helpers.o
index bfcf43c2592a09a1512dde456db770538b463a4b..b8894c451aca9d31631f691b5ea403b08cd0f40e 100644 (file)
@@ -53,6 +53,7 @@ config CRC_T10DIF_ARCH
        default y if ARM && KERNEL_MODE_NEON
        default y if ARM64 && KERNEL_MODE_NEON
        default y if PPC64 && ALTIVEC
+       default y if RISCV && RISCV_ISA_ZBC
 
 config CRC32
        tristate
@@ -72,6 +73,7 @@ config CRC32_ARCH
        default y if LOONGARCH
        default y if MIPS && CPU_MIPSR6
        default y if PPC64 && ALTIVEC
+       default y if RISCV && RISCV_ISA_ZBC
 
 config CRC64
        tristate
@@ -85,6 +87,7 @@ config ARCH_HAS_CRC64
 config CRC64_ARCH
        bool
        depends on CRC64 && CRC_OPTIMIZATIONS
+       default y if RISCV && RISCV_ISA_ZBC && 64BIT
 
 config CRC_OPTIMIZATIONS
        bool "Enable optimized CRC implementations" if EXPERT
index 555fd3fb6d19789a09b2bdcfcb6ab0ce624963bf..190f889adf556e98daf332c3993204c94e0f0e47 100644 (file)
@@ -16,6 +16,7 @@ CFLAGS_crc-t10dif-main.o += -I$(src)/$(SRCARCH)
 crc-t10dif-$(CONFIG_ARM) += arm/crc-t10dif-core.o
 crc-t10dif-$(CONFIG_ARM64) += arm64/crc-t10dif-core.o
 crc-t10dif-$(CONFIG_PPC) += powerpc/crct10dif-vpmsum_asm.o
+crc-t10dif-$(CONFIG_RISCV) += riscv/crc16_msb.o
 endif
 
 obj-$(CONFIG_CRC32) += crc32.o
@@ -25,12 +26,14 @@ CFLAGS_crc32-main.o += -I$(src)/$(SRCARCH)
 crc32-$(CONFIG_ARM) += arm/crc32-core.o
 crc32-$(CONFIG_ARM64) += arm64/crc32-core.o
 crc32-$(CONFIG_PPC) += powerpc/crc32c-vpmsum_asm.o
+crc32-$(CONFIG_RISCV) += riscv/crc32_lsb.o riscv/crc32_msb.o
 endif
 
 obj-$(CONFIG_CRC64) += crc64.o
 crc64-y := crc64-main.o
 ifeq ($(CONFIG_CRC64_ARCH),y)
 CFLAGS_crc64-main.o += -I$(src)/$(SRCARCH)
+crc64-$(CONFIG_RISCV) += riscv/crc64_lsb.o riscv/crc64_msb.o
 endif
 
 obj-y += tests/
similarity index 62%
rename from arch/riscv/lib/crc-t10dif.c
rename to lib/crc/riscv/crc-t10dif.h
index e6b0051ccd86ca916043a7b8b778ed7aef6d2e6b..cd6136cbfda1c37174fb215c5b9e0900e315d630 100644 (file)
@@ -7,18 +7,12 @@
 
 #include <asm/hwcap.h>
 #include <asm/alternative-macros.h>
-#include <linux/crc-t10dif.h>
-#include <linux/module.h>
 
 #include "crc-clmul.h"
 
-u16 crc_t10dif_arch(u16 crc, const u8 *p, size_t len)
+static inline u16 crc_t10dif_arch(u16 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc16_msb_clmul(crc, p, len, &crc16_msb_0x8bb7_consts);
        return crc_t10dif_generic(crc, p, len);
 }
-EXPORT_SYMBOL(crc_t10dif_arch);
-
-MODULE_DESCRIPTION("RISC-V optimized CRC-T10DIF function");
-MODULE_LICENSE("GPL");
similarity index 66%
rename from arch/riscv/lib/crc32.c
rename to lib/crc/riscv/crc32.h
index a3188b7d9c403e9d7cddcfa085b687289a4485fc..3ec6eee98afa8d96e0bbc513c02b88c96f4a9088 100644 (file)
@@ -7,39 +7,34 @@
 
 #include <asm/hwcap.h>
 #include <asm/alternative-macros.h>
-#include <linux/crc32.h>
-#include <linux/module.h>
 
 #include "crc-clmul.h"
 
-u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)
+static inline u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc32_lsb_clmul(crc, p, len,
                                       &crc32_lsb_0xedb88320_consts);
        return crc32_le_base(crc, p, len);
 }
-EXPORT_SYMBOL(crc32_le_arch);
 
-u32 crc32_be_arch(u32 crc, const u8 *p, size_t len)
+static inline u32 crc32_be_arch(u32 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc32_msb_clmul(crc, p, len,
                                       &crc32_msb_0x04c11db7_consts);
        return crc32_be_base(crc, p, len);
 }
-EXPORT_SYMBOL(crc32_be_arch);
 
-u32 crc32c_arch(u32 crc, const u8 *p, size_t len)
+static inline u32 crc32c_arch(u32 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc32_lsb_clmul(crc, p, len,
                                       &crc32_lsb_0x82f63b78_consts);
        return crc32c_base(crc, p, len);
 }
-EXPORT_SYMBOL(crc32c_arch);
 
-u32 crc32_optimizations(void)
+static inline u32 crc32_optimizations_arch(void)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return CRC32_LE_OPTIMIZATION |
@@ -47,7 +42,3 @@ u32 crc32_optimizations(void)
                       CRC32C_OPTIMIZATION;
        return 0;
 }
-EXPORT_SYMBOL(crc32_optimizations);
-
-MODULE_DESCRIPTION("RISC-V optimized CRC32 functions");
-MODULE_LICENSE("GPL");
similarity index 65%
rename from arch/riscv/lib/crc64.c
rename to lib/crc/riscv/crc64.h
index f0015a27836a43d9d2f126bc6c6739bf98cb6cb0..a1b7873fde57912c2c9d7174df16cb011531ca0e 100644 (file)
@@ -7,28 +7,21 @@
 
 #include <asm/hwcap.h>
 #include <asm/alternative-macros.h>
-#include <linux/crc64.h>
-#include <linux/module.h>
 
 #include "crc-clmul.h"
 
-u64 crc64_be_arch(u64 crc, const u8 *p, size_t len)
+static inline u64 crc64_be_arch(u64 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc64_msb_clmul(crc, p, len,
                                       &crc64_msb_0x42f0e1eba9ea3693_consts);
        return crc64_be_generic(crc, p, len);
 }
-EXPORT_SYMBOL(crc64_be_arch);
 
-u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len)
+static inline u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len)
 {
        if (riscv_has_extension_likely(RISCV_ISA_EXT_ZBC))
                return crc64_lsb_clmul(crc, p, len,
                                       &crc64_lsb_0x9a6c9329ac4bc9b5_consts);
        return crc64_nvme_generic(crc, p, len);
 }
-EXPORT_SYMBOL(crc64_nvme_arch);
-
-MODULE_DESCRIPTION("RISC-V optimized CRC64 functions");
-MODULE_LICENSE("GPL");