]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to float widening conversion)
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Wed, 31 May 2023 10:43:44 +0000 (18:43 +0800)
committerPan Li <pan2.li@intel.com>
Wed, 31 May 2023 13:52:46 +0000 (21:52 +0800)
Base on the discussion here:
https://github.com/riscv/riscv-v-spec/issues/884

vfwcvt.f.x<u>.v doesn't depend on FRM. So remove FRM preparing for mode switching support.

gcc/ChangeLog:

* config/riscv/vector.md: Remove FRM.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/config/riscv/vector.md

index 60f052bcec9228221aed6071d14f18b955d7cf21..cb4e77e7854b23b8fb684b0c58c3a6ac8c800ca1 100644 (file)
             (match_operand 5 "const_int_operand"            "    i,    i")
             (match_operand 6 "const_int_operand"            "    i,    i")
             (match_operand 7 "const_int_operand"            "    i,    i")
-            (match_operand 8 "const_int_operand"            "    i,    i")
             (reg:SI VL_REGNUM)
-            (reg:SI VTYPE_REGNUM)
-            (reg:SI FRM_REGNUM)] UNSPEC_VPREDICATE)
+            (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
          (any_float:VF
             (match_operand:<VNCONVERT> 3 "register_operand" "   vr,   vr"))
          (match_operand:VF 2 "vector_merge_operand"         "   vu,    0")))]