aarch64: Fix aarch64_expand_subvti constant handling [PR93335]

The two patterns that call aarch64_expand_subvti ensure that {low,high}_in1
is a register, while {low,high}_in2 can be a register or immediate.
subdi3_compare1_imm uses the aarch64_plus_immediate predicate for its last
two operands (the value and negated value), but aarch64_expand_subvti calls
it whenever low_in2 is a CONST_INT, which leads to ICEs during vregs pass,
as the emitted insn is not recognized as valid subdi3_compare1_imm.
The following patch fixes that by only using subdi3_compare1_imm if it is ok
to do so, and otherwise force the constant into register and use the
non-immediate version - subdi3_compare1.
Furthermore, previously the code was calling force_reg on high_in2 only if
low_in2 is CONST_INT, on the (reasonable) assumption is that only if low_in2
is a CONST_INT, high_in2 can be non-REG, but with the above changes even in
the else we might have CONST_INT and force_reg doesn't do anything if the
operand is already a REG, so this patch calls it unconditionally.

2020-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/93335
	* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
	gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
	predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
	Call force_reg on high_in2 unconditionally.

	* gcc.c-torture/compile/pr93335.c: New test.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1d62d16d808b9c093cb4a4a86a3d4ddb5c5ffd21..b91e5ca168226f4a4f00a061bde2c89a779f68f4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2020-01-22  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/93335
+       * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
+       gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
+       predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
+       Call force_reg on high_in2 unconditionally.
+
 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/91298

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 82e9b1fbfd8526f57554a82fe2621acc9a9df020..90c6ea35dc1a5034e0c7a30004cd9e4036650acf 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -17247,14 +17247,15 @@ aarch64_expand_subvti (rtx op0, rtx low_dest, rtx low_in1,
     }
   else
     {
-      if (CONST_INT_P (low_in2))
+      if (aarch64_plus_immediate (low_in2, DImode))
+       emit_insn (gen_subdi3_compare1_imm (low_dest, low_in1, low_in2,
+                                           GEN_INT (-INTVAL (low_in2))));
+      else
        {
-         high_in2 = force_reg (DImode, high_in2);
-         emit_insn (gen_subdi3_compare1_imm (low_dest, low_in1, low_in2,
-                                             GEN_INT (-INTVAL (low_in2))));
+         low_in2 = force_reg (DImode, low_in2);
+         emit_insn (gen_subdi3_compare1 (low_dest, low_in1, low_in2));
        }
-      else
-       emit_insn (gen_subdi3_compare1 (low_dest, low_in1, low_in2));
+      high_in2 = force_reg (DImode, high_in2);
 
       if (unsigned_p)
        emit_insn (gen_usubdi3_carryinC (high_dest, high_in1, high_in2));

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bebe9a75fa5f154d72654c0223378ba72b2ec84f..60c0a8ad578443b246078da00bc21a9a9cebcfb2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-22  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/93335
+       * gcc.c-torture/compile/pr93335.c: New test.
+
 2020-01-22  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/91298

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr93335.c b/gcc/testsuite/gcc.c-torture/compile/pr93335.c
new file mode 100644 (file)
index 0000000..c6e984c
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr93335.c
@@ -0,0 +1,98 @@
+/* PR target/93335 */
+/* { dg-do compile { target int128 } } */
+
+int
+f1 (unsigned int x)
+{
+  return __builtin_sub_overflow_p (x, 4096, (unsigned __int128) 0);
+}
+
+int
+f2 (unsigned int x)
+{
+  return __builtin_sub_overflow_p (x, 4097, (unsigned __int128) 0);
+}
+
+int
+f3 (int x)
+{
+  return __builtin_sub_overflow_p (x, 4096, (__int128) 0);
+}
+
+int
+f4 (int x)
+{
+  return __builtin_sub_overflow_p (x, 4097, (__int128) 0);
+}
+
+int
+f5 (unsigned int x)
+{
+  return __builtin_sub_overflow_p (x, -4096, (unsigned __int128) 0);
+}
+
+int
+f6 (unsigned int x)
+{
+  return __builtin_sub_overflow_p (x, -4097, (unsigned __int128) 0);
+}
+
+int
+f7 (int x)
+{
+  return __builtin_sub_overflow_p (x, -4096, (__int128) 0);
+}
+
+int
+f8 (int x)
+{
+  return __builtin_sub_overflow_p (x, -4097, (__int128) 0);
+}
+
+int
+f9 (unsigned int x)
+{
+  return __builtin_add_overflow_p (x, 4096, (unsigned __int128) 0);
+}
+
+int
+f10 (unsigned int x)
+{
+  return __builtin_add_overflow_p (x, 4097, (unsigned __int128) 0);
+}
+
+int
+f11 (int x)
+{
+  return __builtin_add_overflow_p (x, 4096, (__int128) 0);
+}
+
+int
+f12 (int x)
+{
+  return __builtin_add_overflow_p (x, 4097, (__int128) 0);
+}
+
+int
+f13 (unsigned int x)
+{
+  return __builtin_add_overflow_p (x, -4096, (unsigned __int128) 0);
+}
+
+int
+f14 (unsigned int x)
+{
+  return __builtin_add_overflow_p (x, -4097, (unsigned __int128) 0);
+}
+
+int
+f15 (int x)
+{
+  return __builtin_add_overflow_p (x, -4096, (__int128) 0);
+}
+
+int
+f16 (int x)
+{
+  return __builtin_add_overflow_p (x, -4097, (__int128) 0);
+}