clk: at91: sam9x7: Fix gmac_gclk clock definition

According to the datasheet (see link section), table 12.1, instance ID 24
is used for the GMAC generic clock, while instance ID 67 is reserved. Add
the correct gmac_gclk entry at ID 24, aligned with the SoC clock layout,
and remove the old misplaced entry at ID 67.

Link: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAM9X75-SIP-Series-Data-Sheet-DS60001827.pdf
Fixes: 33013b43e271 ("clk: at91: sam9x7: add sam9x7 pmc driver")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20260309075329.1528-4-mihai.sain@microchip.com
[claudiu.beznea: massaged the patch description]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 89868a0aeaba9319836f7b36aa8d322f320c8478..6b330c3e6bca847e4595e844de774bb5e228daaa 100644 (file)
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -569,6 +569,15 @@ static const struct {
                .pp_chg_id = INT_MIN,
        },
 
+       {
+               .n = "gmac_gclk",
+               .id = 24,
+               .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+               .pp_mux_table = { 6, 8, },
+               .pp_count = 2,
+               .pp_chg_id = INT_MIN,
+       },
+
        {
                .n = "lcd_gclk",
                .id = 25,
@@ -702,15 +711,6 @@ static const struct {
                .pp_count = 1,
                .pp_chg_id = INT_MIN,
        },
-
-       {
-               .n = "gmac_gclk",
-               .id = 67,
-               .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
-               .pp_mux_table = { 6, 8, },
-               .pp_count = 2,
-               .pp_chg_id = INT_MIN,
-       },
 };
 
 static void __init sam9x7_pmc_setup(struct device_node *np)