Add test cases for LDRHT (Thumb), LDRSHT (Thumb), [LDR,ST]{S}[B,H]T (ARM).

Pertains to 321891, 323035, 324047.  (vasily.golubev@gmail.com)

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13583

diff --git a/none/tests/arm/Makefile.am b/none/tests/arm/Makefile.am
index 571664fdd1252ee1db121defd300ffaa7ac8ceb7..2a19f5b1c7707d20bef352a920847df911ea86b3 100644 (file)
--- a/none/tests/arm/Makefile.am
+++ b/none/tests/arm/Makefile.am
@@ -6,6 +6,7 @@ dist_noinst_SCRIPTS = filter_stderr
 EXTRA_DIST = \
        intdiv.stdout.exp intdiv.stderr.exp intdiv.vgtest \
        ldrt.stdout.exp ldrt.stderr.exp ldrt.vgtest \
+       ldrt_arm.stdout.exp ldrt_arm.stderr.exp ldrt_arm.vgtest \
        neon128.stdout.exp neon128.stderr.exp neon128.vgtest \
        neon64.stdout.exp neon64.stderr.exp neon64.vgtest \
        v6intARM.stdout.exp v6intARM.stderr.exp v6intARM.vgtest \
@@ -19,6 +20,7 @@ check_PROGRAMS = \
        allexec \
        intdiv \
        ldrt \
+       ldrt_arm \
        neon128 \
        neon64 \
        v6intARM \
@@ -60,3 +62,4 @@ neon64_CFLAGS     = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \
 
 intdiv_CFLAGS    = $(AM_CFLAGS) -g -mcpu=cortex-a15 -mthumb
 ldrt_CFLAGS      = $(AM_CFLAGS) -g -mcpu=cortex-a8 -mthumb
+ldrt_arm_CFLAGS          = $(AM_CFLAGS) -g -mcpu=cortex-a8 -marm

diff --git a/none/tests/arm/ldrt.c b/none/tests/arm/ldrt.c
index b08f4e99b28ad709ee22facc97b4e176d9218056..4d305832649825b327d28960053ddcafdfb7c16e 100644 (file)
--- a/none/tests/arm/ldrt.c
+++ b/none/tests/arm/ldrt.c
@@ -34,6 +34,24 @@ __attribute__((noinline)) void do_strbt_imm_132 ( unsigned char* p, UInt* val )
   );
 }
 
+__attribute__((noinline)) UInt do_ldrht_imm_1 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+      "mov r4, %1 ; ldrht r5, [r4, #1]; mov %0, r5"
+      : "=r"(res) : "r"(val) : "r4", "r5"
+  );
+  return res;
+}
+
+__attribute__((noinline)) void do_ldrsht_imm_1 (UInt* res)
+{
+  __asm__ __volatile__(
+     "mov r4, %1 ; ldrsht r5, [r4, #1] ; str r5, [r4, #0]"
+     : "+r"(res) : : "r4", "r5", "memory"
+  );
+}
+
 __attribute__((noinline)) void do_strht_imm_132 ( unsigned char* p, UInt* val )
 {
   __asm__ __volatile__(
@@ -104,5 +122,14 @@ int main ( void )
   printf("result is %u (should be %llu)\n",
          do_ldrsbt_imm_2((unsigned char*)&val_ldrsbt), 4294967294ULL);
 
+
+  UInt val_ldrht = 0xABFEFD8D;
+  printf("result is %u (should be %u)\n",
+         do_ldrht_imm_1((unsigned char*)(&val_ldrht)), 65277);
+
+  UInt val_ldrsht = 0x00BADFAA;
+  do_ldrsht_imm_1(&val_ldrsht);
+  printf("result is 0x%x (should be 0x%x)\n", val_ldrsht, 0xFFFFBADF);
+
   return 0;
 }

diff --git a/none/tests/arm/ldrt.stdout.exp b/none/tests/arm/ldrt.stdout.exp
index 1c4fe2b52619c8e318f0529962f3e29206a82809..fc5fb0dbafd3ddce47943ae75a49b941618f5114 100644 (file)
--- a/none/tests/arm/ldrt.stdout.exp
+++ b/none/tests/arm/ldrt.stdout.exp
@@ -4,3 +4,5 @@ result is 131 255 133 (should be 131 255 133)
 result is 131 255 255 134 (should be 131 255 255 134)
 result is 137 (should be 137)
 result is 4294967294 (should be 4294967294)
+result is 65277 (should be 65277)
+result is 0xffffbadf (should be 0xffffbadf)

diff --git a/none/tests/arm/ldrt_arm.c b/none/tests/arm/ldrt_arm.c
new file mode 100644 (file)
index 0000000..2fa83b9
--- /dev/null
+++ b/none/tests/arm/ldrt_arm.c
@@ -0,0 +1,237 @@
+// This should be compiled as ARM code.
+
+#include <stdio.h>
+#include <malloc.h>
+
+typedef unsigned int UInt;
+
+__attribute__((noinline)) UInt do_ldrt_A1_imm_132 ( unsigned char* p )
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice do ldrt for testing post-indexed.
+     "mov r5, %1 ; ldrt r6, [r5], #+132 ; ldrt r6, [r5], #132 ; mov %0, r6"
+      : "=r"(res) : "r"(p) : "r5", "r6"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrt_A2_imm_132 ( unsigned char* p )
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrt for testing post-indexed.
+     "mov r5, %1 ; mov r6, #33; ldrt r7, [r5], +r6, lsl #2 ; ldrt r7, [r5], +r6, lsl #2 ; mov %0, r7"
+      : "=r"(res) : "r"(p) : "r5", "r6", "r7"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrbt_A1_imm_2 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrbt for testing post-indexed.
+     "mov r4, %1 ; ldrbt r5, [r4], #+2; ldrbt r5, [r4], #+2; mov %0, r5"
+     : "=r"(res) : "r"(val) : "r4", "r5"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrbt_A2_imm_2 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrbt for testing post-indexed.
+     "mov r4, %1 ; mov r5, #4; ldrbt r6, [r4], +r5, lsr #2 ; ldrbt r6, [r4], +r5, lsr #2; mov %0, r6"
+     : "=r"(res) : "r"(val) : "r4", "r5", "r6"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrht_A1_imm_m2 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrht for testing post-indexed.
+     "mov r4, %1 ; ldrht r5, [r4], #-2 ; ldrht r5, [r4], #-2 ; mov %0, r5"
+     : "=r"(res) : "r"(val) : "r4", "r5"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrht_A2_imm_m2 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrht for testing post-indexed.
+     "mov r4, %1 ; mov r5, #2 ; ldrht r6, [r4], -r5 ; ldrht r6, [r4], -r5 ; mov %0, r6"
+     : "=r"(res) : "r"(val) : "r4", "r5", "r6"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrsht_A1_imm_m2 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrsht for testing post-indexed.
+     "mov r4, %1 ; ldrsht r5, [r4], #-2 ; ldrsht r5, [r4], #-2 ; mov %0, r5"
+     : "=r"(res) : "r"(val) : "r4", "r5"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrsht_A2_imm_1 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrsht for testing post-indexed.
+     "mov r4, %1 ; mov r5, #1 ; ldrsht r6, [r4], r5 ; ldrsht r6, [r4], r5 ; mov %0, r6"
+     : "=r"(res) : "r"(val) : "r4", "r5", "r6"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrsbt_A1_imm_1 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrsbt for testing post-indexed.
+     "mov r4, %1 ; ldrsbt r5, [r4], #1 ; ldrsbt r5, [r4], #1 ; mov %0, r5"
+     : "=r"(res) : "r"(val) : "r4", "r5"
+  );
+  return res;
+}
+
+__attribute__((noinline)) UInt do_ldrsbt_A2_imm_1 (unsigned char* val)
+{
+  UInt res;
+  __asm__ __volatile__(
+  // Twice ldrsbt for testing post-indexed.
+     "mov r4, %1 ; mov r5, #1 ; ldrsbt r6, [r4], r5 ; ldrsbt r6, [r4], r5 ; mov %0, r6"
+     : "=r"(res) : "r"(val) : "r4", "r5", "r6"
+  );
+  return res;
+}
+
+__attribute__((noinline)) void do_strbt_A1_imm_1 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strbt for testing post-indexed.
+     "mov r4, %0 ; mov r5, #0xCD ; strbt r5, [r4], #1 ; strbt r5, [r4], #1"
+     : : "r"(val) : "r4", "r5"
+  );
+}
+
+__attribute__((noinline)) void do_strbt_A2_imm_1 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strbt for testing post-indexed.
+     "mov r4, %0 ; mov r5, #1 ; mov r6, #0xCD ; strbt r6, [r4], r5, LSL #1 ; strbt r6, [r4], r5"
+     : : "r"(val) : "r4", "r5", "r6"
+  );
+}
+
+__attribute__((noinline)) void do_strht_A1_imm_1 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strht for testing post-indexed.
+     "mov r4, %0 ; ldr r5, =0xABCD ; strht r5, [r4], #1 ; strht r5, [r4], #1"
+     : : "r"(val) : "r4", "r5"
+  );
+}
+
+__attribute__((noinline)) void do_strht_A2_imm_1 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strht for testing post-indexed.
+     "mov r4, %0 ; mov r5, #1 ; ldr r6, =0xDCBA ; strht r6, [r4], r5  ; strht r6, [r4], r5"
+     : : "r"(val) : "r4", "r5", "r6"
+  );
+}
+
+__attribute__((noinline)) void do_strt_A1_imm_4 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strt for testing post-indexed.
+     "mov r4, %0 ; ldr r5, =0xABCDEFFF ; strt r5, [r4], #4  ; ldr r5, =0x01234567 ; strt r5, [r4], #0"
+     : : "r"(val) : "r4", "r5"
+  );
+}
+
+__attribute__((noinline)) void do_strt_A2_imm_4 (unsigned char* val)
+{
+  __asm__ __volatile__(
+  // Twice strt for testing post-indexed.
+     "mov r4, %0 ; mov r5, #2 ; ldr r6, =0xFFFEDCBA ; strt r6, [r4], -r5, LSL #1  ; mov r5, #0 ; ldr r6, =0x76543210 ; strt r6, [r4], +r5"
+     : : "r"(val) : "r4", "r5", "r6"
+  );
+}
+
+int main ( void )
+{
+  UInt i;
+  unsigned char* b = malloc(256);
+  for (i = 0; i < 256; i++) b[i] = (unsigned char)i;
+  UInt r = do_ldrt_A1_imm_132(b);
+  free(b);
+  printf("result is 0x%08x (should be 0x%08x)\n", r, 0x87868584);
+
+  UInt j;
+  unsigned char* c = malloc(256);
+  for (j = 0; j < 256; j++) c[j] = (unsigned char)j;
+  UInt k = do_ldrt_A2_imm_132(c);
+  free(c);
+  printf("result is 0x%08x (should be 0x%08x)\n", k, 0x87868584);
+
+  UInt val_ldrbt = (200 << 0) | (150 << 8) | (137 << 16) | (10 << 24);
+  printf("result is %u (should be %u)\n", do_ldrbt_A1_imm_2((unsigned char*)&val_ldrbt), 137);
+
+  UInt val_ldrbt_A2 = (200 << 0) | (150 << 8) | (137 << 16) | (10 << 24);
+  printf("result is %u (should be %u)\n", do_ldrbt_A2_imm_2((unsigned char*)&val_ldrbt_A2), 150);
+
+  UInt val_ldrht_A1 = (0xC8 << 0) | (0xF6 << 8) | (0xBB << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrht_A1_imm_m2((unsigned char*)&val_ldrht_A1 + 2), 0x0000F6C8);
+
+  UInt val_ldrht_A2 = (0xC8 << 0) | (0xF7 << 8) | (0xBB << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrht_A2_imm_m2((unsigned char*)&val_ldrht_A2 + 2), 0x0000F7C8);
+
+  UInt val_ldrsht_A1 = (0x08 << 0) | (0xFC << 8) | (0x0B << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrsht_A1_imm_m2((unsigned char*)&val_ldrsht_A1 + 2), 0xFFFFFC08);
+
+  UInt val_ldrsht_A2 = (0xC8 << 0) | (0x0B << 8) | (0xFB << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrsht_A2_imm_1((unsigned char*)&val_ldrsht_A2), 0xFFFFFB0B);
+
+  UInt val_ldrsbt_A1 = (0xC8 << 0) | (0xF0 << 8) | (0xCD << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrsbt_A1_imm_1((unsigned char*)&val_ldrsbt_A1), 0xFFFFFFF0);
+
+  UInt val_ldrsbt_A2 = (0xC8 << 0) | (0xF0 << 8) | (0xFD << 16) | (0x0A << 24);
+  printf("result is %u (should be %u)\n", do_ldrsbt_A2_imm_1((unsigned char*)&val_ldrsbt_A2 + 1), 0xFFFFFFFD);
+
+  UInt val_strbt_A1 = (0xC8 << 0) | (0xF0 << 8) | (0xFD << 16) | (0x0A << 24);
+  do_strbt_A1_imm_1((unsigned char*)&val_strbt_A1);
+  printf("result is %u (should be %u)\n", val_strbt_A1, 0x0AFDCDCD);
+
+  UInt val_strbt_A2 = (0xC8 << 0) | (0xF0 << 8) | (0xFD << 16) | (0x0A << 24);
+  do_strbt_A2_imm_1((unsigned char*)&val_strbt_A2);
+  printf("result is %u (should be %u)\n", val_strbt_A2, 0x0ACDF0CD);
+
+  UInt val_strht_A1 = 0xFFFFFFFF;
+  do_strht_A1_imm_1((unsigned char*)&val_strht_A1);
+  printf("result is %u (should be %u)\n", val_strht_A1, 0xFFABCDCD);
+
+  UInt val_strht_A2 = 0xFFFFFFFF;
+  do_strht_A2_imm_1((unsigned char*)&val_strht_A2);
+  printf("result is %u (should be %u)\n", val_strht_A2, 0xFFDCBABA);
+
+  UInt val_strt_A1[2] = {0xFFFFFFFF, 0xFFFFFFFF};
+  do_strt_A1_imm_4((unsigned char*)&val_strt_A1[0]);
+  printf("result is %u %u (should be %u %u)\n", val_strt_A1[0], val_strt_A1[1], 0xABCDEFFF, 0x01234567);
+
+  UInt val_strt_A2[2] = {0xFFFFFFFF, 0xFFFFFFFF};
+  do_strt_A2_imm_4((unsigned char*)&val_strt_A2[1]);
+  printf("result is %u %u (should be %u %u)\n", val_strt_A2[0], val_strt_A2[1], 0x76543210, 0xFFFEDCBA);
+
+  return 0;
+}

diff --git a/none/tests/arm/ldrt_arm.stderr.exp b/none/tests/arm/ldrt_arm.stderr.exp
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/none/tests/arm/ldrt_arm.stdout.exp b/none/tests/arm/ldrt_arm.stdout.exp
new file mode 100644 (file)
index 0000000..a9c7b92
--- /dev/null
+++ b/none/tests/arm/ldrt_arm.stdout.exp
@@ -0,0 +1,16 @@
+result is 0x87868584 (should be 0x87868584)
+result is 0x87868584 (should be 0x87868584)
+result is 137 (should be 137)
+result is 150 (should be 150)
+result is 63176 (should be 63176)
+result is 63432 (should be 63432)
+result is 4294966280 (should be 4294966280)
+result is 4294966027 (should be 4294966027)
+result is 4294967280 (should be 4294967280)
+result is 4294967293 (should be 4294967293)
+result is 184405453 (should be 184405453)
+result is 181268685 (should be 181268685)
+result is 4289449421 (should be 4289449421)
+result is 4292655802 (should be 4292655802)
+result is 2882400255 19088743 (should be 2882400255 19088743)
+result is 1985229328 4294892730 (should be 1985229328 4294892730)

diff --git a/none/tests/arm/ldrt_arm.vgtest b/none/tests/arm/ldrt_arm.vgtest
new file mode 100644 (file)
index 0000000..13dc101
--- /dev/null
+++ b/none/tests/arm/ldrt_arm.vgtest
@@ -0,0 +1,2 @@
+prog: ldrt_arm
+vgopts: -q