]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
perf arm_spe: Expose SIMD information in other operations
authorLeo Yan <leo.yan@arm.com>
Wed, 12 Nov 2025 18:24:42 +0000 (18:24 +0000)
committerNamhyung Kim <namhyung@kernel.org>
Wed, 19 Nov 2025 04:31:30 +0000 (20:31 -0800)
The other operations contain SME data processing, ASE (Advanced SIMD)
and floating-point operations. Expose these info in the records.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
tools/perf/util/arm-spe-decoder/arm-spe-decoder.h

index 649471abef6a4386e1b250a19cda4f4caeb0a2ff..9e02b2bdd1177193996d071dd88f969e25b1ad86 100644 (file)
@@ -237,8 +237,24 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
                                break;
                        case SPE_OP_PKT_HDR_CLASS_OTHER:
                                decoder->record.op |= ARM_SPE_OP_OTHER;
-                               if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload))
+                               if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload)) {
                                        decoder->record.op |= ARM_SPE_OP_SVE | ARM_SPE_OP_DP;
+                                       if (payload & SPE_OP_PKT_OTHER_FP)
+                                               decoder->record.op |= ARM_SPE_OP_FP;
+                                       if (payload & SPE_OP_PKT_SVE_PRED)
+                                               decoder->record.op |= ARM_SPE_OP_PRED;
+                               } else if (SPE_OP_PKT_OTHER_SUBCLASS_SME(payload)) {
+                                       decoder->record.op |= ARM_SPE_OP_SME;
+                                       if (payload & SPE_OP_PKT_OTHER_FP)
+                                               decoder->record.op |= ARM_SPE_OP_FP;
+                               } else if (SPE_OP_PKT_OTHER_SUBCLASS_OTHER(payload)) {
+                                       if (payload & SPE_OP_PKT_OTHER_ASE)
+                                               decoder->record.op |= ARM_SPE_OP_ASE;
+                                       if (payload & SPE_OP_PKT_OTHER_FP)
+                                               decoder->record.op |= ARM_SPE_OP_FP;
+                                       if (payload & SPE_OP_PKT_COND)
+                                               decoder->record.op |= ARM_SPE_OP_COND;
+                               }
                                break;
                        case SPE_OP_PKT_HDR_CLASS_BR_ERET:
                                decoder->record.op |= ARM_SPE_OP_BRANCH_ERET;
index b838e9c6168c6b7c20bb63b8e7c9d27c35f416dc..3310e05122f02e8ef32f79f8ed3c6932cc43eecc 100644 (file)
@@ -48,6 +48,8 @@ enum arm_spe_2nd_op_ldst {
        ARM_SPE_OP_MEMCPY               = 1 << 14,
        ARM_SPE_OP_MEMSET               = 1 << 15,
        ARM_SPE_OP_GCS                  = 1 << 16,
+       ARM_SPE_OP_SME                  = 1 << 17,
+       ARM_SPE_OP_ASE                  = 1 << 18,
 
        /* Assisted information for memory / SIMD */
        ARM_SPE_OP_LD                   = 1 << 20,
@@ -59,6 +61,8 @@ enum arm_spe_2nd_op_ldst {
        ARM_SPE_OP_PRED                 = 1 << 26,      /* Predicated */
        ARM_SPE_OP_SG                   = 1 << 27,      /* Gather/Scatter */
        ARM_SPE_OP_COMM                 = 1 << 28,      /* Common */
+       ARM_SPE_OP_FP                   = 1 << 29,      /* Floating-point */
+       ARM_SPE_OP_COND                 = 1 << 30,      /* Conditional */
 };
 
 enum arm_spe_2nd_op_branch {