return kvm_buf_set_msrs(cpu);
}
+static int kvm_put_kvm_regs(X86CPU *cpu)
+{
+ CPUX86State *env = &cpu->env;
+ int ret;
+
+ if ((env->features[FEAT_7_0_ECX] & CPUID_7_0_ECX_CET_SHSTK)) {
+ ret = kvm_set_one_reg(CPU(cpu), KVM_X86_REG_KVM(KVM_REG_GUEST_SSP),
+ &env->guest_ssp);
+ if (ret) {
+ return ret;
+ }
+ }
+ return 0;
+}
+
+static int kvm_get_kvm_regs(X86CPU *cpu)
+{
+ CPUX86State *env = &cpu->env;
+ int ret;
+
+ if ((env->features[FEAT_7_0_ECX] & CPUID_7_0_ECX_CET_SHSTK)) {
+ ret = kvm_get_one_reg(CPU(cpu), KVM_X86_REG_KVM(KVM_REG_GUEST_SSP),
+ &env->guest_ssp);
+ if (ret) {
+ return ret;
+ }
+ }
+ return 0;
+}
static int kvm_get_xsave(X86CPU *cpu)
{
error_setg_errno(errp, -ret, "Failed to set MSRs");
return ret;
}
+ ret = kvm_put_kvm_regs(x86_cpu);
+ if (ret < 0) {
+ error_setg_errno(errp, -ret, "Failed to set KVM type registers");
+ return ret;
+ }
ret = kvm_put_vcpu_events(x86_cpu, level);
if (ret < 0) {
error_setg_errno(errp, -ret, "Failed to set vCPU events");
error_setg_errno(errp, -ret, "Failed to get MSRs");
goto out;
}
+ ret = kvm_get_kvm_regs(cpu);
+ if (ret < 0) {
+ error_setg_errno(errp, -ret, "Failed to get KVM type registers");
+ goto out;
+ }
ret = kvm_get_apic(cpu);
if (ret < 0) {
error_setg_errno(errp, -ret, "Failed to get APIC");