features.pauth = hwcap & AARCH64_HWCAP_PACA;
features.mte = hwcap2 & HWCAP2_MTE;
features.tls = true;
+ features.capacity = hwcap2 & HWCAP2_MORELLO;
return aarch64_read_description (features);
}
features.pauth = hwcap & AARCH64_HWCAP_PACA;
features.mte = hwcap2 & HWCAP2_MTE;
features.tls = tls != nullptr;
+ features.capability = hwcap2 & HWCAP2_MORELLO;
return aarch64_read_description (features);
}
return best_arch->gdbarch;
}
+ /* FIXME-Morello: Put a check in place so we can determine, from ELF, if
+ we are dealing with a capability-enabled binary or not. */
+ bool have_capability = false;
+
/* Ensure we always have a target descriptor, and that it is for the given VQ
value. */
const struct target_desc *tdesc = info.target_desc;
{
aarch64_features features;
features.vq = vq;
+ features.capability = have_capability;
tdesc = aarch64_read_description (features);
}
gdb_assert (tdesc);
the existing target description. Figure out how to do that.
Maybe replace the general purpose register description with
the capability registers. */
- regnum = create_feature_aarch64_capability (tdesc.get (), regnum);
+ if (features.capability)
+ regnum = create_feature_aarch64_capability (tdesc.get (), regnum);
return tdesc.release ();
}
bool pauth = false;
bool mte = false;
bool tls = false;
+ bool capability = false;
};
inline bool operator==(const aarch64_features &lhs, const aarch64_features &rhs)
return lhs.vq == rhs.vq
&& lhs.pauth == rhs.pauth
&& lhs.mte == rhs.mte
- && lhs.tls == rhs.tls;
+ && lhs.tls == rhs.tls
+ && lhs.capability == rhs.capability;
}
namespace std
h = h << 1 | features.pauth;
h = h << 1 | features.mte;
h = h << 1 | features.tls;
+ h = h << 1 | features.capability;
return h;
}
};
/* A-profile MTE is 64-bit only. */
features.mte = linux_get_hwcap2 (8) & HWCAP2_MTE;
features.tls = true;
+ /* Morello is 64-bit only. */
+ features.capability = linux_get_hwcap2 (8) & HWCAP2_MORELLO;
current_process ()->tdesc = aarch64_linux_read_description (features);