arm64: dts: imx952-evk: Enable I2C[2,3,4,6,7] bus

Enable I2C bus[2,3,4,6,7] and the io-expanders connected to each I2C bus.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx952-evk.dts b/arch/arm64/boot/dts/freescale/imx952-evk.dts
index e5d989bd7c7b7f8b7c0b0afd0ae8f108110e4a49..98f2f96a91cc37acff64615e85cb718cb666a00b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx952-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx952-evk.dts
@@ -17,6 +17,14 @@
                gpio2 = &gpio3;
                gpio3 = &gpio4;
                gpio4 = &gpio5;
+               i2c0 = &lpi2c1;
+               i2c1 = &lpi2c2;
+               i2c2 = &lpi2c3;
+               i2c3 = &lpi2c4;
+               i2c4 = &lpi2c5;
+               i2c5 = &lpi2c6;
+               i2c6 = &lpi2c7;
+               i2c7 = &lpi2c8;
                mmc0 = &usdhc1;
                mmc1 = &usdhc2;
                serial0 = &lpuart1;
@@ -79,6 +87,111 @@
        };
 };
 
+&lpi2c2 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c2>;
+       status = "okay";
+
+       adp5585: io-expander@34 {
+               compatible = "adi,adp5585-00", "adi,adp5585";
+               reg = <0x34>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-reserved-ranges = <5 1>;
+               #pwm-cells = <3>;
+       };
+};
+
+&lpi2c3 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c3>;
+       status = "okay";
+
+       i2c3_pcal6408: gpio@20 {
+               compatible = "nxp,pcal6408";
+               reg = <0x20>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               vcc-supply = <&reg_3p3v>;
+       };
+};
+
+&lpi2c4 {
+       clock-frequency = <400000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c4>;
+       status = "okay";
+
+       i2c4_pcal6408: gpio@21 {
+               compatible = "nxp,pcal6408";
+               reg = <0x21>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_i2c4_pcal6408>;
+               vcc-supply = <&reg_3p3v>;
+       };
+};
+
+&lpi2c6 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c6>;
+       status = "okay";
+
+       pcal6416: gpio@21 {
+               compatible = "nxp,pcal6416";
+               #gpio-cells = <2>;
+               gpio-controller;
+               reg = <0x21>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pcal6416>;
+               vcc-supply = <&reg_3p3v>;
+
+               pdm-can-sel-hog {
+                       gpio-hog;
+                       gpios = <10 GPIO_ACTIVE_HIGH>;
+                       output-low;
+               };
+
+               mqs-en-hog {
+                       gpio-hog;
+                       gpios = <15 GPIO_ACTIVE_HIGH>;
+                       output-low;
+               };
+       };
+};
+
+&lpi2c7 {
+       clock-frequency = <1000000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpi2c7>;
+       status = "okay";
+
+       pcal6524: gpio@22 {
+               compatible = "nxp,pcal6524";
+               reg = <0x22>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_pcal6524>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
 &lpuart1 {
        /* console */
        pinctrl-names = "default";
@@ -112,6 +225,59 @@
 };
 
 &scmi_iomuxc {
+       pinctrl_lpi2c2: lpi2c2grp {
+               fsl,pins = <
+                       IMX952_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL              0x40000b9e
+                       IMX952_PAD_I2C2_SDA__AONMIX_TOP_LPI2C2_SDA              0x40000b9e
+               >;
+       };
+
+       pinctrl_lpi2c3: lpi2c3grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO00__WAKEUPMIX_TOP_LPI2C3_SDA          0x40000b9e
+                       IMX952_PAD_GPIO_IO01__WAKEUPMIX_TOP_LPI2C3_SCL          0x40000b9e
+               >;
+       };
+
+       pinctrl_lpi2c4: lpi2c4grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO30__WAKEUPMIX_TOP_LPI2C4_SDA          0x40000b9e
+                       IMX952_PAD_GPIO_IO31__WAKEUPMIX_TOP_LPI2C4_SCL          0x40000b9e
+               >;
+       };
+
+       pinctrl_i2c4_pcal6408: i2c4pcal6408grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO18__WAKEUPMIX_TOP_GPIO2_IO_18         0x31e
+               >;
+       };
+
+       pinctrl_lpi2c6: lpi2c6grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO02__WAKEUPMIX_TOP_LPI2C6_SDA          0x40000b9e
+                       IMX952_PAD_GPIO_IO03__WAKEUPMIX_TOP_LPI2C6_SCL          0x40000b9e
+               >;
+       };
+
+       pinctrl_lpi2c7: lpi2c7grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO08__WAKEUPMIX_TOP_LPI2C7_SDA          0x40000b9e
+                       IMX952_PAD_GPIO_IO09__WAKEUPMIX_TOP_LPI2C7_SCL          0x40000b9e
+               >;
+       };
+
+       pinctrl_pcal6416: pcal6416grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO10__WAKEUPMIX_TOP_GPIO2_IO_10         0x31e
+               >;
+       };
+
+       pinctrl_pcal6524: pcal6524grp {
+               fsl,pins = <
+                       IMX952_PAD_GPIO_IO36__WAKEUPMIX_TOP_GPIO5_IO_16         0x31e
+               >;
+       };
+
        pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
                fsl,pins = <
                        IMX952_PAD_SD2_RESET_B__WAKEUPMIX_TOP_GPIO3_IO_7        0x31e