Add vassert for DFP shift value to make sure shift value is an immediate value.

V-bit tester was putting shift value in a register for the DFP shift
instructions causing the test to crash, see bugzilla #305948.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2512

diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c
index 4cfccda09f8f1879a51653ee27e2a184947e001b..7b369cdeffd935723a430e7b9df4858f2ad2f9f7 100644 (file)
--- a/VEX/priv/host_ppc_isel.c
+++ b/VEX/priv/host_ppc_isel.c
@@ -3963,7 +3963,7 @@ static HReg iselDfp64Expr_wrk(ISelEnv* env, IRExpr* e)
       }
 
       switch (e->Iex.Binop.op) {
-      /* shift instructions F64, I32 -> F64 */
+      /* shift instructions D64, I32 -> D64 */
       case Iop_ShlD64: fpop = Pfp_DSCLI; break;
       case Iop_ShrD64: fpop = Pfp_DSCRI; break;
       default: break;
@@ -3972,6 +3972,9 @@ static HReg iselDfp64Expr_wrk(ISelEnv* env, IRExpr* e)
          HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg1);
          PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2);
 
+         /* shift value must be an immediate value */
+         vassert(shift->tag == Pri_Imm);
+
          addInstr(env, PPCInstr_DfpShift(fpop, fr_dst, fr_src, shift));
          return fr_dst;
       }