arm64: dts: freescale: imx8mp-tqma8mpql-mba8mp-ras314: fix UART1 RTS/CTS muxing

UART1 operates in DCE mode, but the RTS/CTS pins were incorrectly
configured using the DTE pinmux setting.

Correct the pinmux to match DCE mode. Switching the RTS and CTS signals
is fine for this board, as UART1 is routed to a pin header. Existing
functionality is unaffected, as RTS/CTS could never have worked with
the incorrect pinmux.

Fixes: ddabb3ce3f90 ("arm64: dts: freescale: add TQMa8MPQL on MBa8MP-RAS314")
Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
index 04f4c2fdf29921ca30f11fd4768ff6f1ef74c9db..94e2a7df3556011e86973c3f6b54ba2fc000a713 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts
@@ -915,8 +915,8 @@
        pinctrl_uart1: uart1grp {
                fsl,pins = <MX8MP_IOMUXC_SAI2_RXFS__UART1_DCE_TX        0x14>,
                           <MX8MP_IOMUXC_SAI2_RXC__UART1_DCE_RX         0x14>,
-                          <MX8MP_IOMUXC_SAI2_RXD0__UART1_DTE_CTS       0x14>,
-                          <MX8MP_IOMUXC_SAI2_TXFS__UART1_DTE_RTS       0x14>;
+                          <MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS       0x14>,
+                          <MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS       0x14>;
        };
 
        pinctrl_uart1_gpio: uart1gpiogrp {